Technical data

iv
Clocks Are Good but the Processor
LEDs Are All Lit................................................... 2-28
LEDs Show Failure Code After Starting Boot
Pattern ....................................................................2-29
The Enable Register Is Incorrect ..........................................2-29
IP19 LEDs Show a Static 0xe Pattern................................... 2-29
IP21 LEDs Show a Static 0x14 Pattern ................................ 2-29
IP19 LEDs Show a Static 0xc Pattern................................... 2-29
IP21 LEDs Show a Static 0x12 Pattern ................................ 2-30
LEDs Boot to Master/Slave Patterns but UART
Output is Garbled or Missing. ...........................2-30
2.5.2 IO4 Troubleshooting Procedures..........................................2-30
2.5.3 Using the System Controller................................................. 2-30
Systems With Dead Monitors or Terminals ....................... 2-30
Communicating with the System over the System
Controller Port ......................................................2-31
Defeating the System Controller.......................................... 2-31
Communicating With a Disabled Processor ......................2-32
2.5.4 Using a Debug Kernel to Find System Hangs.................... 2-32
2.5.5 Procedure to Cause a Hung System to Enter POD
Mode.........................................................................................2-33
2.5.6 Using POD to Diagnose MC3 Clock Jitter...........................2-34
2.6 Error Message Syntax...............................................................................2-35
2.7 Known Problems......................................................................................2-36
2.7.1 IRIX 5.0.1 ..................................................................................2-36
2.7.2 Paging and File Quotas..........................................................2-36
2.7.3 MC3 Clock Jitter......................................................................2-36
2.7.4 MC3 Error Latching................................................................2-37
2.7.5 ECC Check Bit Single Bit Error.............................................2-37
2.7.6 SIMM failures..........................................................................2-37
2.7.7 IP19 EAROM Corruption.......................................................2-38
2.7.8 Ebus Parity Error/POKB Error Due to Backplane
Voltage Droop.........................................................................2-38
2.7.9 MC3 SIMM Failure.................................................................2-39
2.7.10 VME Bus Error on PIO Read.................................................2-39