Technical data

CHALLENGE/Onyx Diagnostic Road Map 6-47
mem4 Write/Read data patterns
(ported from the IP17 mem3 test)
(4 minutes/128 MB)
This test does word
read/writes of all-1’s and
all-0’s patterns. It shows if all
addresses appear to be
writable, and that all bits may
be set to both 1 and 0.
However, it provides no
address error or
adjacent-bits-shorted
detection. The flow is as
follows:
(w0), u(r0,w1), d(r1,w5a),
u(r5a,ra5), d(ra5)
– word and byte
(Read as: write 0 to all
locations, read 0 and write 1 to
all locations in ascending
order, read 1 and write 5a to
all locations in descending
order, read 5a and write a5 to
all locations in ascending
order, read a5 from all
locations in descending order)
The mem13 test does byte
read/writes in the same
pattern. The tests were
separated out since the byte
read/writes take a long time.
mem5 Address in address memory test
(4 minutes/128 MB)
This is a traditional, heuristic,
rule-of-thumb,
address-in-address memory
test. It also puts the
complement of the address in
the address, and makes passes
in both ascending and
descending addressing order.
There are both full memory
store then check passes, as
well as read- after-write
passes (with complementing).
Test Function Description
Table 6-10 (continued) MC3 Tests