Technical data

CHALLENGE/Onyx Diagnostic Road Map 6-35
cache37 (sd_dirtywbh) - Secondary Dirty Writeback (Half-word) Test
This verifies the block (four words) write mode in data cache. It writes to K0 (0x80020000)
cached space, causing the cache to become dirty. Then it replaces the cache line by reading
0x80022000, which is a different cache line with same offset. This causes the data in
0x80020000 to be written back to memory which now has the same data as in 0x80020000.
Multiple cache lines are tested back to back. Half-word transactions are tested.
Possible errors:
010505a: Unexpected Cache write through to memory on store halfword
addr = %x
expected = %4x, actual = %4x, XOR %4x
Seconday TAG %
010505b: Halfword read replaced a dirty line in Secondary, dirty line not
written back to memory
addr = %x
expected = %4x, actual = %4x, XOR %4x
Seconday TAG %x
cache38 (sd_dirtywbb) - Secondary Dirty Writeback (Byte) Test
This verifies the block (four words) write mode in data cache. It writes to K0 (0x80020000)
cached space, causing the cache to become dirty. Then it replaces the cache line by reading
0x80022000, which is a different cache line with same offset. This causes the data in
0x80020000 to be written back to memory which now has the same data as in 0x80020000.
Multiple cache lines are tested back to back. Byte transactions are tested.
Possible errors:
010505c: Unexpected Cache write through to memory on store byte
addr = %x
expected = %2x, actual = %2x, XOR %2x
Seconday TAG %x
010505d: Byte read replaced a dirty line in Secondary, dirty line not written
back to memory
Dirty line not written back to memory
addr = %x
expected = %2x, actual = %2x, XOR %2x
Seconday TAG %x
cache39 (sd_tagecc) - Secondary TAG ECC Test
This checks the data integrity of the secondary data tag RAM path, using a walking
ones/zeros pattern.
Possible errors:
010505e: Secondary Data TAG RAM ECC Path error (walking one as data)
TAG RAM Location 0x%x
Expected 0x%x Actual= 0x%x XOR= 0x%x
010505f: Secondary Data TAG RAM ECC Path error (walking zero as data)
TAG RAM Location 0x%x
Expected 0x%x Actual= 0x%x XOR= 0x%x