Technical data

CHALLENGE/Onyx Diagnostic Road Map 6-33
cache33 (d_hitwb) - Primary Data Hit Writeback Test
This is hit writeback cache operation on the data cache.
Possible errors:
010404f: D-cache state error during initialization
Cache state did not change to valid when filled from memory
Cache line address: 0x%08x
Expected cache state: 0x%08x Actual cache state: 0x%08x
TAGLO Reg %x
Re-Read dtag %x
Re-Read stag %x
0104050: D-cache state error Hit writeback happened on a clean exclusive line
Cache line address: 0x%08x
PTAG %x
Scache TAG %x
0104051: D-cache Hit writeback happened on a cache miss
Cache line address: 0x%08x
Miss address: 0x%08x
PTAG %x
Scache TAG %x
0104052: D-cache Hit writeback did not happen on a cache hit
Cache line address: 0x%08x
PTAG %x
Scache TAG %x
0104053: D-cache Hit Writeback clears the write back bi
Cache line address: 0x%08x
cache34 (d_dirtywbw) - Primary Data Dirty Writeback Word Test
This verifies the block (four words) write mode in data cache. It writes to K0 (0x80020000)
cached space, causing the cache to be marked dirty. Then it replace the cache line by
reading 0x80022000, a different cache line with same offset. This causes the data in
0x80020000 to writeback to memory, which now has the same data as in 0x80020000.
Multiple cache lines are tested back to back.
Possible errors:
0104054: Unexpected Cache write through to memory
addr %x, expected %x, actual %x, XOR %x
Seconday TAG %x
0104055: Cache writeback did not occur on a word store to a dirty line
addr %x
expected %x, actual %x, XOR %x
Seconday TAG %x