Technical data

CHALLENGE/Onyx Diagnostic Road Map 6-31
cache26 (i_aina) - Primary Instruction Data RAM Address In Address Test
Performs an address in address test on the primary instruction cache.
Possible error:
0107041: I-cache address in address error
addr %x, exp %x, act %x, XOR %x
cache27 (i_function) - Primary Instruction Functionality Test
This tests the functionality of the entire instruction cache. It checks the block fill and hit
write back of the instruction cache lines.
Possible error:
0107042: I-cache block write back error
Memory contains incorrect data
Cache address: 0x%08x
Expected: 0x%08x Actual: 0x%08x Xor: 0x%08x
Icache TAG = %x
Scache TAG = %x
cache28 (i_parity) - Primary Instruction Parity Generation Test
This tests the parity bit generation of the I-cache data RAM.
Possible error:
0104043: I-cache parity generation error
error %x
Cache byte address: 0x%08x data:0x%02x
Parity bit position: 0x%02
Expected parity: 0x%02x Actual parity:0x%02x
cache29 (i_hitinv) - Primary Instruction Hit Invalidate Test
This tests the Hit Invalidate cache operation on the instruction cache.
Possible errors:
0104044: I-cache state error during initialization
Cache state did not change to valid when filled from memory
Cache line address: 0x%08x
Expected cache state: 0x%08x Actual cache state: 0x%08x
0104045: I-cache state error
Hit Invalidate changed the line to invalid on a miss
Cache line address: 0x%08x
Miss address: 0x%08x
Expected cache state: 0x%08x Actual cache state: 0x%08x
0104046: I-cache state error on a Hit Invalidate Cache OP
Hit Invalidate did not invalidate the line on a hit
Cache line address: 0x%08x
Expected cache state: 0x%08x Actual cache state: 0x%08x