Technical data

6-24 Interactive Diagnostics Environment (IDE)
cache5 (PdTagKh) - Primary Data TAG Knaizuk Hartmann Test
This tests the data integrity of the primary data cache TAG RAM with the Knaizuk
Hartmann algorithm. It treats the TAG RAM array as a ordinary memory array. The parity
bit is not checked in this test.
Note: This algorithm is used to perform a fast but nonexhaustive memory test. It will test
a memory subsystem for stuck-at faults in both the address lines as well as the data
locations.
The algorithm breaks up the memory to be tested into 3 partitions. Partition 0 consists of
memory locations 0, 3, 6, ...; partition 1 consists of memory locations 1,4,7,...; partition 2
consists of locations 2,5,8...; The partitions are filled with either an all-ones pattern or an
all-zeros pattern. By varying the order in which the partitions are filled and then checked,
this algorithm checks all combinations of possible stuck-at-faults.
Possible errors:
0104007: Partition 1 error after partition 0 set to 0xaaaaaaaa
0104008: Partition 2 error after partition 1 set to 0xaaaaaaaa
0104009: Partition 0 error after partition 1 set to 0xaaaaaaaa
010400a: Partition 1 error after partition 1 set to 0xaaaaaaaa
010400b: Partition 0 error after partition 0 set to 0x55555555
010400c: Partition 2 error after partition 2 set to 0xaaaaaaaa
For each of the above errors, the following additional information is also provided:
Tag ram address: 0x%08x
Expected: 0x%08x Actual: 0x%08x Xor: 0x%08x
cache6 (pitagwlk) - Primary Instruction TAG RAM Data Line Test
This checks the data integrity of the primary instruction cache TAG RAM path using a
walking ones and zeros pattern.
Possible error:
010400d: I-cache tag ram data line error
Failed sliding one (or zero) test at 0x%08x
Expected: 0x%08x, Actual: 0x%08x
cache7 (pitagadr) - Primary Instruction TAG RAM Address Line Test
This tests the address lines to the primary instruction cache TAG RAM by sliding a one and
then a zero on the address lines. This test assumes that the TagLo register is in good
working condition.
Possible error:
010400e: I-cache tag ram address line error
Failed sliding one (or zero) test at 0x%08x
Expected: 0x%08x Actual 0x%08x