Technical data

CHALLENGE/Onyx Diagnostic Road Map 6-19
tlb8 (tlb_c) - Check C Bits In TLB Entry
Attempts to access TLB-mapped memory in both cached and uncached modes. Tests all
slots by writing and reading back a pattern, first in cached mode, then in uncached mode.
This test checks basic functionality, and does not attempt to detect cached/uncached
interactions.
Possible errors:
010800f: Exception during cached write to 0x%x
0108010: Cached write to 0x%x failed
0108011: TLB %s entry %d cached mode exception
0108012: TLB %s entry %d cached R/W error : Wrote 0x%x Read 0x%x
0108013: TLB %s entry %d uncached mode exception
0108014: TLB %s entry %d uncached R/W error : Wrote 0x%x Read 0x%x
tlb9 (tlb_mapuc) - Check Cached/Uncached TLB Access
Checks that both cached and uncached mapped accesses work without interfering with
each other. The purpose of this test is to detect the R4000/R4400 mapped uncached
writeback bug. To do this, the test sets up two TLB entries for the same page of physical
memory, one using cached access and the other using uncached entries. A write is done via
each of the TLB entries, followed by a read. If the R4000/R4400 cache is working properly,
the test will be able to read back the correct (different) pattern for each access mode,
because the code avoids flushing the cache to main memory. If the bug is present, the same
value will be read back via both cached and uncached access. The writes are done in both
cached/uncached and uncached/cached orders.
Possible errors:
0108004: TLB %s entry %d cached/uncached W exception
0108005: TLB %s entry %d cached/uncached W error : Wrote 0x%x Read 0x%x
0108006: TLB %s entry %d uncached/cached W execption
0108007: TLB %s entry %d uncached/cached W error : Wrote 0x%x Read 0x%x
6.4.3 Floating-Point Unit (FPU) Tests
There are fourteen floating-point unit tests that check the FPU in the MIPS R4000/R4400.
These are described in the following sections.
fpu1 (fpregs) - FPU Register Test
This test simply writes and reads the FPU registers, reporting any readback errors.
Possible errors:
010901e: FP register %d data error : Expected 0x%x Got 0x%x
010901f: FP register %d inverted data error : Expected 0x%x Got 0x%x