Technical data

CHALLENGE/Onyx Diagnostic Road Map 6-17

ip8 (intr_group) - Check IP19 Processor Group Interrupt

This test generated level 0 interrupts using different processor groups at different priority

levels including broadcast interrupts.

Possible errors:

010301e: Group interrupt pending not set correctly in EV_IP0 : Expected 0x%llx

Got 0x%llx

010301f: Group highest priority interrupt level failure : HPIL 0x%llx

0103020: Group interrupt not indicated in Cause register 0x%x

0103021: Group interrupt pending not cleared : IP0 0x%llx IP1 0x%llx

0103022: Group highest priority interrupt level not cleared : HPIL 0x%llx

0103023: Group interrupt pending not cleared in Cause register : Cause 0x%x

0103024: Group interrupt did not occur : group 0x%x priority 0x%x

0103025: Group interrupt pending not cleared in Cause : Cause 0x%x

6.4.2 Translation Lookaside Buffer (TLB) Tests

There are nine TLB tests that check the translation lookaside buffer in the MIPS

R4000/R4400. They are described in the following sections.

tlb1 (tlb_ram) - Test R4K TLB as RAM

Tests the TLB as a small memory array. Checks to see that all read/write bits can be toggled

and that all undeﬁned bits read back zero.

Possible errors:

0108001: TLBHI entry %d R/W error: Wrote 0x%x Read 0x%x

0108002: TLBLO even entry %d R/W error: Wrote 0x%x Read 0x%x

0108003: TLBLO odd entry %d R/W error: Wrote 0x%x Read 0x%x

tlb2 (tlb_probe) - Check TLB Functionality

Sets up all the TLB slots and then probes them with matching addresses. Checks to ensure

that there is a response for each valid address.

Possible error:

0108018: TLB probe error : Expected entry %d Got entry %d vpnum %d addr 0x%x

tlb3 (tlb_xlate) - Check TLB Address Translation

Tests for correct virtual to physical translation via mapped TLB entries. Sets the virtual

address to user segment and uncached.

Possible errors:

010801b: TLB entry %d unexpected exception for addr 0x%x

010801c: TLB entry %d translation error at addr 0x%x : Wrote %d Read %d