Technical data

CHALLENGE/Onyx Diagnostic Road Map 5-5

Figure 5-4 Power-On Test Sequence (Part 4 of 4)

5.2.2 IP21 Power-On Tests

The power-on test sequence for the IP19 CPU board is illustrated in the ﬂowchart that

spans Figure 5-5 through Figure 5-8

Test IO4

PROM

Load IO4

PrOM

Pass

Go into

POD mode

Fail

Test caches

and bus tags

Make slaves test

their caches and

bus tags

Test I/O

devices

Initialize I/O PROM

and drivers

Call PROM Command

Monitor (or GUI)