Specifications

(ENABLE
INTERRUPTS
FROM
AM9S13
OUT3
LINE
ENABLE
INTERRUPTS
IT
r'-
-0
2T
FROM
AM9S13
OUT2
"0 0
LINE
3T
4T
~
SET
"ON"
FOR
16
BIT
OR
24
BIT
ADDRESSING
I/O
or
MEMORY
SWS
MAPPED
SELECTION
SW4
~
10
TI
6000b0l
~
I,
,,0
,
O~O+-:-D
O=-=-.O
=0
0
~
t
~t
~
+ '
-t
1 t ,
SET
"O~"
TO
GENERATE
ONE
WAIT
STATE
WHEN
AM9S13
IS
ADDRESSED
SET
"ON"
TO
CAliSE
CPU
TO
WAIT
FOR
A/D
TO
FINISH
CONVERSION
SET"ON"
FOR
POLLED
INTERRUPTS
IF
CPU
WAIT
IS
ON
(SW3-6)
THIS
SWITCH
MAY
NEED
TO
BE
ON
IF
THE
CPU
IS
TOO
FAST
A14
INTERRUPT
SW2
SET
"ON"
FOR
24
('SIT
AODRESSING
\
SW3
~1-lb--'DLL2
oLD
o5-S
'06-
La
JLfJ
J
~
JrJD-'-b-'lo-""o-"-8.Lb..B-
o
I
A~~'
l±-t
:t
1
AU
A20
AlB
TIMER
INTERRUPT
2
,
OVERRUN
?ONE)\.
Jb--A
A
TlM
,ER
INTERRUPT
VECTOR
VECTOR
INTERRUPT
thru
LINE
7
LINE
0
SWS-S
UN
OfF
SINP
+
MEMORY
I/O
SOUT
MAPPED
MAPPED
SWl-3.4
SMEMR
+
DO
NOT
MEMORY
SMEMW
USE
MAPPED
SWl
1 2 3 4
~~&
THESE
SIDES
IN
FOR
THESE
SIDES
IN
TO
SELECT
SOUT
AND
SINP
24
BIT
ADDRESSING
OTHER
SIDES
IN
TO
SELECT
SMEMR
AND
SMEMW
AD212
MOTHER
BOARD
SWITCH
ASSIGNMENTS
w
o