Specifications
Sd.
Timing
and
Control
Options
All
module
functions are
initiated
directly
or
indirectly
by
the
rising
edge
of the
STROBE
pulse.
The
mo,t straightforward
method
of
operation
has
jumper
4C
connected
to
either
SC
or to
16C.
In
this case. the
STROBE
pulse causes the internal counter
to receive or increment
to
a
new
multiplexer address.
The
multiplexer switches
to
a
new
channel
and
the signal to
be
converted propagates
through
the inout
circuitry
to the
AID
circuit.
Since this process takes time,
the
conversion cannot
begin
on
the
rising
edge
of the
STROBE
pulse. Instead,
STROBE
starts
a timer
whose
period
is
chosen
to
be
just
long
enough
for
the input
circuitry
to
stabely acquire the
new
channel. A
negative
going
pulse
called
OLYOUT
starts
at
the
end
of the timer
interval.
The
above
jumper
routes
OLYOUT
to
A/O
TRIG-
which
starts
the
actual conversion.
The
signal
EOe
(End
of
Conversion)
goes
high
at this
time
and
remains
high
until conversion
is
complete
and
the
digital
data
is
stable
on
the
module
1
s output
lines.
EOC
is
used
to immediately load the data into three
74LS374's,
IC23,
IC27
and
IC29.
The
data
is
now
available for
reading
by
the
CPU
and
the double buffering frees the
module
to
begin another conversion cycle immediately.
EOC
also strobes
two
flip-flops
called
DONE
and
OVERRUN.
DONE
is
left
set
by
EOC
if
it
was
not
already
and
is
used
to signal the
CPU
that the
data
is
available.
The
act
of
reading the
most
significant
data
byte in
IC29
also clears the
DONE
flop.
Thus
for
eight
bit
transfers,
if
the software
is
arranged
so
that the
most
significant
byte
is
read
last,
then
the
DONE
flop will
remain
set
until
all
of
the
data
has
been
read.
The
OVERRUN
flip-flop
will always
remain
a
zero as long as the
DONE
flop
is
cleared before the
end
of the
next
EOC
pulse.
More
importantly, the
OVERRIIN
flop will
be
set
if
new
data
is
loaded into the
74LS374
l
s before the
CPU
has
read
the
previous data. This allows the user to operate
at
the highest
possible covers ion rates
and
still
have
confidence that
he
is
not
losing
or
perverting his data. Since checking the status
of
the
OVERRUN
flop
after
every
data
word
is
read
aou1d
slow
down
the
system.
it
is
preferable to operate
this
flop
in
an
interrupt
mode
so
that the
CPU
is
interrupted
if
and
only
if
an
overrun occurs.
The
STROBE
pulse
may
originate
from
one
of
several sources.
The
simplest
means
of
generation
is
to
write to port 4
which
produces
the signal
ADSTRW.
which
serves
as
the strobe pulse. (See
Register
Assignments
- Write) A gated external strobe input
is
provided
on
P3.
pin 3.
of
the timer connector. This input
is
enabled
when
bit
3
of
the
command
register
is
high. Notice that
leaving
bit
3
high
without tying the external input
law
will
prevent the use
of
ADSTRW.
A conversion
is
initiated
on
the
rising
edge
of
the external strobe
signal.
If
strobing
at
regular intervals
is
desired without requiring the
attention
of the
CPU,
the
AM9Sl3
can
be
a very
flexible
source
of
strobe pulses.
The
external strobe.
pin 3.
on
P3
is
conveniently located next to
OUTS.
pin 4
from
the timer.
thus allowing
OUTS
to
serve
as
the strobe source
by
simplv
sliding
a