Data Sheet
Table Of Contents
- 1. General description
- 2. Features
- 3. Applications
- 4. Ordering information
- 5. Functional diagram
- 6. Pinning information
- 7. Functional description
- 8. Limiting values
- 9. Recommended operating conditions
- 10. Static characteristics
- 11. Dynamic characteristics
- 12. Waveforms
- 13. Package outline
- 14. Abbreviations
- 15. Revision history
- 16. Legal information
- 17. Contact information
- 18. Contents
HEF4049B_5 © NXP B.V. 2008. All rights reserved.
Product data sheet Rev. 05 — 11 November 2008 3 of 11
NXP Semiconductors
HEF4049B
Hex inverting buffers
7. Functional description
8. Limiting values
[1] For DIP16 package: P
tot
derates linearly with 12 mW/K above 70 °C.
[2] For SO16 package: P
tot
derates linearly with 8 mW/K above 70 °C.
9. Recommended operating conditions
1A to 6A 3, 5, 7, 9, 11, 14 input
V
SS
8 ground supply voltage
n.c. 13, 16 not connected
Table 2. Pin description
…continued
Symbol Pin Description
Table 3. Guaranteed fan-out
Driven element Guaranteed fan-out
Standard TTL 2
74 LS 9
74 L 16
Table 4. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol Parameter Conditions Min Max Unit
V
DD
supply voltage −0.5 +18 V
V
I
input voltage any input −0.5 V
DD
+ 0.5 V
I
I/O
input/output current - ±10 mA
T
stg
storage temperature −65 +150 °C
T
amb
ambient temperature −40 +85 °C
P
tot
total power dissipation T
amb
−40 °C to +85 °C
DIP16 package
[1]
- 750 mW
SO16 package
[2]
- 500 mW
P power dissipation per output - 100 mW
Table 5. Recommended operating conditions
Symbol Parameter Conditions Min Typ Max Unit
V
DD
supply voltage 3 - 15 V
V
I
input voltage 0 - V
DD
V
T
amb
ambient temperature in free air −40 - +85 °C
∆t/∆V input transition rise and fall rate V
DD
= 5 V - - 3.75 ns/V
V
DD
= 10 V - - 0.5 ns/V
V
DD
= 15 V - - 0.08 ns/V