User`s guide

Copyright © 2012 congatec AG TCEDm10 46/94
Table 11 LVDS Signal Descriptions
Signal Pin # Description I/O PU/PD Comment
LVDS_A0+
LVDS_A0-
LVDS_A1+
LVDS_A1-
LVDS_A2+
LVDS_A2-
LVDS_A3+
LVDS_A3-
A71
A72
A73
A74
A75
A76
A78
A79
LVDS Channel A differential pairs O LVDS
LVDS_A_CK+
LVDS_A_CK-
A81
A82
LVDS Channel A differential clock O LVDS
LVDS_B0+
LVDS_B0-
LVDS_B1+
LVDS_B1-
LVDS_B2+
LVDS_B2-
LVDS_B3+
LVDS_B3-
B71
B72
B73
B74
B75
B76
B77
B78
LVDS Channel B differential pairs O LVDS Not suppported
LVDS_B_CK+
LVDS_B_CK-
B81
B82
LVDS Channel B differential clock O LVDS Not supported
LVDS_VDD_EN A77 LVDS panel power enable O 3.3V PD 10k
LVDS_BKLT_EN B79 LVDS panel backlight enable O 3.3V PD 10k
LVDS_BKLT_CTRL B83 LVDS panel backlight brightness control O 3.3V
LVDS_I2C_CK A83 DDC lines used for at panel detection and control. O 3.3V PU 2k2 3.3V
LVDS_I2C_DAT A84 DDC lines used for at panel detection and control. I/O 3.3V PU 2k2 3.3V LVDS_I2C_DAT is a boot strap signal (see note below).
Note
Some signals have special functionality during the reset process. They may bootstrap some basic important functions of the module.
For more information refer to section 7.5 of this user’s guide.