User`s guide
Copyright © 2008 congatec AG B915m10 60/92
Table 30 IRQ Lines in APIC mode
IRQ# Available Typical Interrupt Source Connected to Pin / Function
0 No Counter 0 Not applicable
1 No Keyboard Not applicable
2 No Cascade Interrupt from Slave PIC Not applicable
3 Yes IRQ3 via SERIRQ
4 Yes IRQ4 via SERIRQ
5 Yes IRQ5 via SERIRQ
6 Yes IRQ6 via SERIRQ
7 Yes IRQ7 via SERIRQ
8 No Real-time Clock Not applicable
9 Note 2 Generic IRQ9 via SERIRQ, option for SCI
10 Yes IRQ10 via SERIRQ
11 Yes IRQ11 via SERIRQ
12 Yes IRQ12 via SERIRQ
13 No Math processor Not applicable
14 Note 1 IDE Controller 0 (IDE0) / Generic IRQ14
15 Note 1 IDE Controller 1 (IDE1) / Generic IRQ15
16 No PIRQA, Integrated VGA Controller, PCI Express Root Port 0, Intel High Denition Audio Controller (Azalia), UHCI
Host Controller 3
17 No PIRQB, AC’97 Audio, PCI Express Root Port 1
18 No PIRQC, Parallel ATA Controller in enhanced/native mode, UHCI Host Controller 2, PCI Express Root Port 2
19 No PIRQD, Serial ATA controller in enhanced/native mode, UHCI Host Controller 1, SMBus Controller, onboard Gigabit
LAN controller
20 Yes PIRQE, PCI Bus INTA, option for SCI
21 Yes PIRQF, PCI Bus INTB
22 Yes PIRQG, PCI Bus INTC
23 Yes PIRQH, PCI Bus INTD, UHCI Host Controller 0, EHCI Host Controller
In APIC mode, the PCI bus interrupt lines are connected with IRQ 20, 21, 22 and 23.
Note
If the ATA/IDE conguration is set to enhanced mode in BIOS setup (serial ATA and parallel ATA native mode operation), IRQ14 and 15 1.
are free for PCI/LPC bus.
In ACPI mode, IRQ9 is used for the SCI (System Control Interrupt). The SCI can be shared with a PCI interrupt line.2.