User`s guide

Copyright © 2008 congatec AG B915m10 51/92
Table 21 SDVO Signal Descriptions
Signal Pin # Description I/O PU/PD Comment
SDVOB_RED+
SDVOB_RED-
D52
D53
Serial Digital Video B red output differential pair. Multiplexed with PEG_TX[0]+ and PEG_TX[0]- pair
on conga-B915 variants equipped with Intel
®
82915GME chipsets.
O PCIE
SDVOB_GRN+
SDVOB_GRN-
D55
D56
Serial Digital Video B green output differential pair. Multiplexed with PEG_TX[1]+ and PEG_TX[1]-
pair on conga-B915 variants equipped with Intel
®
82915GME chipsets.
O PCIE
SDVOB_BLU+
SDVOB_BLU-
D58
D59
Serial Digital Video B blue output differential pair. Multiplexed with PEG_TX[2]+ and PEG_TX[2]-
pair on conga-B915 variants equipped with Intel
®
82915GME chipsets.
O PCIE
SDVOB_CK+
SDVOB_CK-
D61
D62
Serial Digital Video B clock output differential pair. Multiplexed with PEG_TX[3]+ and PEG_TX[3]-
pair on conga-B915 variants equipped with Intel
®
82915GME chipsets.
O PCIE
SDVOB_INT+
SDVOB_INT-
C55
C56
Serial Digital Video B interrupt input differential pair. Multiplexed with PEG_RX[1]+ and PEG_RX[1]-
pair on conga-B915 variants equipped with Intel
®
82915GME chipsets.
I PCIE
SDVOC_RED+
SDVOC_RED-
D65
D66
Serial Digital Video C red output differential pair. Multiplexed with PEG_TX[4]+ and PEG_TX[4]- pair
on conga-B915 variants equipped with Intel
®
82915GME chipsets.
O PCIE
SDVOC_GRN+
SDVOC_GRN-
D68
D69
Serial Digital Video C green output differential pair. Multiplexed with PEG_TX[5]+ and PEG_TX[5]-
pair on conga-B915 variants equipped with Intel
®
82915GME chipsets.
O PCIE
SDVOC_BLU+
SDVOC_BLU-
D71
D72
Serial Digital Video C blue output differential pair. Multiplexed with PEG_TX[6]+ and PEG_TX[6]-
pair on conga-B915 variants equipped with Intel
®
82915GME chipsets.
O PCIE
SDVOC_CK+
SDVOC_CK-
D74
D75
Serial Digital Video C clock output differential pair. Multiplexed with PEG_TX[7]+ and PEG_TX[7]-
pair on conga-B915 variants equipped with Intel
®
82915GME chipsets.
O PCIE
SDVOC_INT+
SDVOC_INT-
C68
C69
Serial Digital Video C interrupt input differential pair. Multiplexed with PEG_RX[5]+ and PEG_RX[5]-
pair on conga-B915 variants equipped with Intel
®
82915GME chipsets.
I PCIE
SDVO_TVCLKIN+
SDVO_TVCLKIN-
C52
C53
Serial Digital Video TV-OUT synchronization clock input differential pair. Multiplexed with PEG_
RX[0]+ and PEG_RX[0]- pair on conga-B915 variants equipped with Intel
®
82915GME chipsets.
I PCIE
SDVO_FLDSTALL+
SDVO_FLDSTALL-
C58
C59
Serial Digital Video Field Stall input differential pair. Multiplexed with PEG_RX[2]+ and PEG_RX[2]-
pair on conga-B915 variants equipped with Intel
®
82915GME chipsets.
I PCIE
SDVO_I2C_CK
(SDVO_CLK)
D73 SDVO I²C clock line to set up SDVO peripherals. O 2.5V
SDVO_I2C_DAT
(SDVO_DATA)
C73 SDVO I²C data line to set up SDVO peripherals. I/O
OD 2.5V
SDVO_I2C_DAT is a
boot strap signal (see
note below)
Note
Some signals have special functionality during the reset process. They may bootstrap some basic important functions of the module. For more
information refer to section 7.5 of this user’s guide.