User`s guide
Copyright © 2008 congatec AG B915m10 49/92
Table 20 PCI Express Signal Descriptions (x16 Graphics)
Signal Pin # Description I/O PU/PD Comment
PEG_RX0+
PEG_RX0-
PEG_RX1+
PEG_RX1-
PEG_RX2+
PEG_RX2-
PEG_RX3+
PEG_RX3-
PEG_RX4+
PEG_RX4-
PEG_RX5+
PEG_RX5-
PEG_RX6+
PEG_RX6-
PEG_RX7+
PEG_RX7-
PEG_RX8+
PEG_RX8-
PEG_RX9+
PEG_RX9-
PEG_RX10+
PEG_RX10-
PEG_RX11+
PEG_RX11-
PEG_RX12+
PEG_RX12-
PEG_RX13+
PEG_RX13-
PEG_RX14+
PEG_RX14-
PEG_RX15+
PEG_RX15-
C52
C53
C55
C56
C58
C59
C61
C62
C65
C66
C68
C69
C71
C72
C74
C75
C78
C79
C81
C82
C85
C86
C88
C89
C91
C92
C94
C95
C98
C99
C101
C102
PCI Express Graphics Receive Input differential pairs. Some of these lines are multiplexed with SDVO
lines.
Note: Can also be used as PCI Express Receive Input differential pairs 16 through 31 known as
PCIE_RX[16-31] + and -.
I
PCIE