Specifications

4.3 ROM Disk ·························4-3
4.4 RAM Disk ·························4-4
5. VME Interface ······················5-1
5.1 VME Bus Interface Features ···················5-1
5.2 VME Byte Swapping ·····················5-2
5.3 VME Bus Error Interrupt ····················5-3
5.4 VME Address Capture ·····················5-3
5.4.1 VME Address Capture Read Register (Read Only) ············5-4
5.4.2 VME Address Capture Control Register (Write Only) ···········5-6
6. Other Interfaces ·····················6-1
6.1 Serial Port ·························6-1
6.2 Keyboard and Mouse Ports ···················6-2
6.3 Ethernet Controllers ······················6-3
6.4 Real-Time Clock ·······················6-4
6.5 Universal Serial Bus (USB) ···················6-5
6.6 Power On Self Test LED/Speaker ·················6-6
7. Memory························7-1
7.1 SDRAM ·························7-2
7.2 Flash EPROM ·······················7-3
7.3 Application Flash EPROM ····················7-4
7.4 Battery backed SRAM ·····················7-5
8. Additional Local I/O Functions ················8-1
8.1 Status & Control Register 0 (I/O address 210h) ·············8-3
8.2 Status & Control Register 2 (I/O address 211h) ·············8-4
8.3 Status & Control Register 1(I/O address 212h) ·············8-5
8.4 Watchdog Timer ·······················8-6
8.4.1 Watchdog Status & Control Register (I/O address 214h) ··········8-7
8.4.2 Watchdog Configuration ····················8-8
8.4.3 Using the Watchdog······················8-8
8.4.4 Programming the Watchdog ···················8-9
8.5 Status & Control Register 4 (I/O address 215h) ·············8-11
8.6 Memory Page and Status Register (I/O address 216h) ··········8-12
8.7 Status & Control Register 3 (I/O address 217h) ·············8-13
8.8 Long Duration Timer/Periodic Interrupt Timer ·············8-14
8.8.1 Long Duration Timer/Periodic Interrupt Timer Low Byte ··········8-15
8.8.2 Long Duration Timer/Periodic Interrupt Timer Mid-low Byte ·········8-15
8.8.3 Long Duration Timer/Periodic Interrupt Timer Mid-high Byte ·········8-15
8.8.4 Long Duration Timer/Periodic Interrupt Timer High Byte ··········8-15
8.8.5 LDT/PIT Status & Control Register ·················8-16
8.8.6 Programming the LDT/PIT ···················8-17
8.9 Port 80 ·························8-20
9. PCBIOS························9-1
9.1 Entering the PC BIOS ·····················9-1
9.2 The PC BIOS Startup Sequence ··················9-3
9.3 Boot device selection ·····················9-4
9.4 PCI Bus Resource Management ··················9-5
9.4.1 PCI Resource Allocation ····················9-5
9.4.2 PCI Device IDs ·······················9-7
10. VME System Architecture Test Handler ·············10-1
10.1 Introduction ························10-1
10.2 The VSA Environment ····················10-1
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