Specifications

11.2.29 Test 42: Non-Volatile RAM Test
This BIST checks the operation of the non-volatile SRAM on the VP 110/01x board. The BIST is
composed of a series of sub-tests. The sub-test number is selected by a BIST parameter; when
run without parameters, a default series of sub-tests is performed.
The available sub-tests are listed below, a (D) against the test indicates that it is executed by
default when no parameters are supplied.
0 - Perform all Default (D) Tests
1 - Non-destructive NVRAM Read/Write Test (D)
2 - NVRAM Data Retention Pattern, setup
3 - NVRAM Data Retention Pattern, check
Error codes are detailed at the end of this section.
At the start of the test, the SRAM size is detected and reported via an autosizing algorithm.
11.2.29.1 Sub-test 1: Non-destructive NVRAM Read/Write Test
This sub-test verifies write-then-read operations across the NVRAM. The original contents of the
memory is saved and restored on successful completion of the sub-test. A marching I/0 pattern
is used during the test.
11.2.29.2 Sub-test 2: NVRAM Data retention Pattern, Setup
This sub-test performs a destructive write-then-read test on the NVRAM. The test uses the
absolute NVRAM offset as a pattern. The pattern remains in memory on successful completion
of the BIST, as this will be used by the Data Retention Check.
NOTE The original content of the memory is destroyed by this test.
11.2.29.3 Sub-test 3: NVRAM Data Retention Pattern Check
This sub-test checks the NVRAM for the data written by the Pattern Test, above. This BIST is
intended to be run after a power-cycle, to ensure that the NVRAM retains its contents.
Error codes:
0410h - sub-test does not exist
0411h - error occurred verifying NVRAM data (0x5A based pattern)
0420h - error occurred verifying NVRAM data (0xA5 based pattern)
0430h - error occurred verifying NVRAM pattern write
VP 110/01x 11-13
VSA Mode Diagnostics