Specifications

SDM-300L3 Satellite Modem Revision 0
Asynchronous Interface/AUPC MN/SDM300L3.IOM
12–2
The transmit data is normally clocked into the modem with the Terminal Timing (TT)
clock in typical EIA-422 operation. The received data is clocked out with the Receive
Timing (RT) clock. The asymmetrical loop timing option allows the transmit and receive
data to be clocked with the same, or a multiple of the same clock. The added benefit is
that the transmit and receive data rates do not have to be the same.
PLL
DDS
TXD
TXC
EXT
RE
F
INT
RXC
S2
S1
MC
ST
TT
TXD
S4
S3
OUTPUT
Clock Selection S1 set to: S2 set to: S3 set to: S4 set to:
TX TERR (TT) DDS INT TT
INT (SCT) DDS INT ST
SCT (INT) DDS EXT REF (See Note 2) ST
SCT (LOOP) DDS EXT REF (See Note 2) ST
INT (LOOP)
(See Note 1)
RXC PLL ST
EXT CLOCK MC PLL ST
Notes:
1. When CONFIGURATION INTERFACE → LOOP TIMING is set to ON, SCT
(INT) will change to read: SCT (LOOP).
2. When CONFIGURATION MOD → MOD REF is set to EXT MOD, S3 will
switch to the EXT REF position.
Figure 12-1. Transmit Section of the Asymmetrical Loop Timing Block Diagram