Specifications

SDM-309B Satellite Modem Maintenance
MN/U-SDM309B Rev. # 6-6–11
6.1.4.4 Viterbi Decoder/Demod Card AS/0949 (Figure 6-8)
TPG Ground Test Point.
TP1 Decoder Data. Data out of the decoder.
TP2 Decoder Clock. Clock out of the decoder.
TP3 Sync Error. Approximate raw error rate. Random TTL pulses. One pulse for every I
channel or Q channel error.
TPG Ground Test Point.
TP4 I Channel Data. Result of the hard decision interface.
50% duty cycle random TTL data.
TP5 Symbol Clock. Result of the symbol clock recovery loop in the demod processor
Section.
TP6 Q Channel Data. Result of the hard decision interface.
50% duty cycle random TTL data.
TP7 Data Clock VCO. 8 MHz to 18 MHz TTL master clock for data clock generation.
TPG Ground Test Point.
Figure 6-8