Product specifications

B–1
Appendix B. FEC (FORWARD
ERROR CORRECTION)
B.1 Introduction
The FEC (Forward Error Correction) method used by the CDD‐880 Multi Receiver Router is a
completely new family of short‐block Low Density Parity Check (LDPC) codes with very low
latency called VersaFEC
®
. VersaFEC is  ideal for lower data rates that demand the shortest
possiblelatency.ItisapatentpendingtechnologywhollyownedanddevelopedbyComtechEF
DataandCEFDsisterdivisionComtechAHACorp.(theVersaFEC

nameisatrademarkregistered
toComtechAHA).
B.2 VersaFEC (Short-block LDPC)
WhileLDPCcodingrepresentsasignificantdevelopmentintheareaofFECandtheperformance
ofLDPCisexceptionalintermsofcodinggain,itshigherlatencyisconsidereddisadvantageous
in some applications.  Because of this, Comtech EF Data invested considerable research into
waysto reducethe blocksizeofLDPC(andhe
nceitslatency),whilepreservingthe codinggain
performance very close to the Shannon bound. The VersaFEC code set was subsequently
developedwithtwodistinctpurposes:

1) Toprovideanexpandedchoiceofcombinationsofmodulationandcodingthatsignificantly
reduceslatencywithoutcompromisingcodinggainperformance.

2) Toprovidecombinationsofmodulationandcodi
ng(ModCods)thataresuitablenotonlyfor
ConstantCodingandModulation(CCM)applications,butarealsothebasisforComtechEF
Data’spatentpendingAdaptiveCodingandModulation(ACM)sys tem. 

There are 12  ModCods in the VersaFEC set (Table B‐1). Th
e modulation types (BPSK, QPSK,
8‐QAMand16‐QAM)andthecoderateshavebeenchosentogiveacontinuousprogressionof
performance in terms of both Eb/No and spectral efficiency – an essential aspect of a well‐
engineeredACMsystem.
