Specifications

CompuLab Ltd. IPC2 – Hardware Specification Page 64 of 83
6.2 SIM Interface
IPC2 system incorporates micro SIM slot with dedicated interface to mini PCIe full size slot. In
conjunction with cellular modem and authenticated micro SIM card from your mobile operator,
the system can be used for cellular communication, data and/or voice (depends on modem).
2G/3G/4G cellular modems in mini PCIe card form factor supported. The micro SIM slot uses 6-
pin interface.
6.3 SPI Interface
The main functionality of SPI bus is initialization, configuration of HW components and BIOS
execution during system power up.
Two Serial NOR flash (SNOR) devices stores system CONFIG and BIOS code.
Attention: IPC2 SPI interface used for system configuration purposes only and restricted for
customer use. Data provided in this section is informative only. Any violation of the design, by the
use of other SPI slave devices may result in system failures and void of warranty.
6.4 Custom Design GPIOs
IPC2 incorporates 7 general purpose input output signals for user application implementations
and custom system design, operated from SuperIO controller via PCH-SuperIO LPC interface. The
GPIOs were selected and configured to provide convenient in/out functionality.
Table 36 – Custom Design GPIO table
SuperIO/Signal
EXT1 pin#
Op state
Direction
Reset state
Pull (PU/PD)
SIO_GPIO15
(CIR_RX)
A4
Always
Out
High
PU – 10k
SIO_GPIO16
A8
S0 (Active)
In
High
PU – weak
SIO_GPIO30
A9
S0 (Active)
In
Low
PD – 100k
SIO_GPIO31
A11
S0 (Active)
In
High
PU – weak
SIO_GPIO35
B16
S0 (Active)
Out
High
PU – 10k
SIO_GPIO36
A20
S0 (Active)
Out
High
PD – 10k
SIO_GPIO37
A12
S0 (Active)
In
High
PU – weak
Notes:
1. SIO_GPIO15 can be used for wakeup event. SMI/PME capable – non-maskable system
management interrupt with highest priority level, and transparent to OS power management.
2. All GPIOs when configured as push-pull output: 8mA sink, 4mA source.
3. All GPIOs when configured as open-drain output: 8mA sink.