Service manual

Ultraview 1030/1050 Monitors — Service Manual
3-10
Software Reset
To cause a software reset, the 860 causes a unrecoverable situation by first disabling its internal
machine check interrupt and then forcing a “machine check” by accessing unmapped address
space. This causes the CPU to reboot.
Power Failure Operation
The power supply on the CPU PCBA provides a digital signal PFAIL to the CPU to indicate that a
power failure condition is imminent. This signal is asserted by the power supply if its input power
fails, or if the monitor is switched OFF. This signal is provided through a power supervisor IC to the
MPC860 as an interrupt, causing the processor to take immediate power failure action.
The power supply will continue to provide DC power to the CPU PCBA for a minimum of
1 millisecond after the power failure condition is detected. The host processor must complete all
power failure actions during this time.
Hard Reset Configuration Word
At the rising edge of HRESET the 860 reads the data bus bits 15-0 to determine its basic
post-reset configuration. Resistor pull-ups on the bus pull certain bits high; the others are pulled
low by weak internal pull downs. The 860 is set to read the following:
Bits 15 - 0 = 0000 0110 1000 0010
If any of these bits are stuck in the wrong state at reset, the 860 won’t properly boot. The detailed
meaning of each bit is explained in the 860 User’s Manual.
Interrupts
The MPC860 processor has two on-chip interrupt controllers, one in the System Interface Unit
(SIU) and a second controller within the Channel Processor Module (CPM). These handle
interrupts on specific input pins of the MPC860. Some interrupts are also routed through the
interrupt controller in the ISA bridge.