Specifications

MSM800XEV/XEL / Detailed System Description
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I/O Address Function Size R/W Comment
481h DMA Channel 2 High Page 8bit Rec
Upper addr bits [31:24]. Write LPC and DMA.
Read only DMA.
482h DMA Channel 3 High Page
483h DMA Channel 1 High Page
484h-486h No specific usage 8bit WO Write LPC and DMA. Read only DMA.
487h DMA Channel 0 High Page 8bit Rec
Upper addr bits [31:24]. Write LPC and DMA.
Read only DMA.
489h DMA Channel 6 High Page 8bit Rec
Upper addr bits [31:24]. Write LPC and DMA.
Read only DMA.
48Ah DMA Channel 7 High Page
48Bh DMA Channel 5 High Page
48Ch-48Eh No specific usage 8bit WO Write LPC and DMA. Read only DMA.
48Fh DMA Channel 4 High Page 8bit Rec
Upper addr bits [31:24]. Write LPC and DMA.
Read only DMA.
490h-4CFh No specific usage --- ---
4D0h PIC Level/Edge 8bit Yes IRQ0-IRQ 7.
4D1h PIC Level/Edge 8bit Yes IRQ8-IRQ15.
4D2h-4FFh No specific usage --- ---
 070h-071h The Diverse Device Snoops writes to this port and maintains the MSB as NMI enabled. When low,
NMI is enabled. When high, NMI is disabled. This bit defaults high. Reads of this port return bits
[6:0] from the on-chip or off-chip target, while Bit 7 is returned from the "maintained" value.