Microprocessor Reference Manual

xii 21264/EV68A Hardware Reference Manual
5–34 DcacheStatusRegister..................................................... 5–32
5–35 CboxDataRegister........................................................ 5–33
5–36 CboxShiftRegister........................................................ 5–33
5–37 WRITE_MANYChainWriteTransactionExample................................ 5–39
6–1 HW_LDInstructionFormat.................................................. 6–4
6–2 HW_STInstructionFormat.................................................. 6–4
6–3 HW_RETInstructionFormat................................................. 6–6
6–4 HW_MFPRandHW_MTPRInstructionsFormat................................. 6–6
6–5 Single-MissDTBInstructionsFlowExample..................................... 6–14
6–6 ITBMissInstructionsFlowExample........................................... 6–16
7–1 Power-Up Timing Sequence ................................................. 7–3
7–2 Fault Reset Sequence of Operation ........................................... 7–9
7–3 SleepModeSequenceofOperation .......................................... 7–11
7–4 ExampleforInitializingBcache............................................... 7–13
7–5 21264/EV68A Reset State Machine State Diagram ............................... 7–17
10–1 Type1HeatSink.......................................................... 10–3
10–2 Type2HeatSink.......................................................... 10–4
10–3 Type3HeatSink.......................................................... 10–5
11–1 TestStat_HPinTimingDuringPower-UpBuilt-InSelf-Test(BiST) ................... 11–5
11–2 TestStat_HPinTimingDuringBuilt-InSelf-Initialization(BiSI)....................... 11–5
11–3 SROMContentMap ....................................................... 11–6