Specifications

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NOTE: Do not use a graphite pencil to change the switch setting.
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Table 8.7-2. SW2 Switch Position Settings
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Position
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12345678Description of Function
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ON OFF ON ON OFF OFF OFF OFF 128 Kbyte Total Memory
ON ON OFF ON OFF OFF OFF OFF 192 Kbyte Total Memory
ON OFF OFF ON OFF OFF OFF OFF 256 Kbyte Total Memory
ON ON ON OFF OFF OFF OFF OFF 320 Kbyte Total Memory
ON OFF ON OFF OFF OFF OFF OFF 384 Kbyte Total Memory
ON ON OFF OFF OFF OFF OFF OFF 448 Kbyte Total Memory
ON OFF OFF OFF OFF OFF OFF OFF 512 Kbyte Total Memory
OFF OFF OFF OFF OFF OFF OFF OFF 544 Kbyte Total Memory
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NOTE: Do not use a graphite pencil to change the switch setting.
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SW1 tells the system the number of diskette drives available, the type of
display to be expected, and whether an 8087 coprocessor is used in the system.
SW2 tells the system the amount of available RAM.
NOTE: If the ROMs installed in socket(s) U40 (and U47 if available) are
Revision C or above, SW2 is ignored. Therefore, on system boards of
Revision J or above, SW2 has been removed.
If Revision C ROMs or above are installed, 256K x 1 RAM chips may be used
instead of 64K x 1 bit RAM chips in banks 2 and 3 of the system board. To do
this, however, a new decoder PROM must be used in socket U35:
o PN 101257-001 (No longer available) if banks 2 and 3 are filled with
256K x 1 RAM chips for a total of 640 Kbytes.
o PN 101256-001 if only bank 3 is filled with 256K x 1 RAM chips for a
total of 448 Kbytes.
Board Version 2
Bank 0 contains 64 Kbytes of soldered in memory in two, 64K x 4 RAM chips.
Bank 1 also contains 64 Kbytes of soldered in memory in two, 64Kx4RAM
chips, for a system total of 128 Kbytes. A chip for the parity bit is
installed for each bank.
Bank 2 consists of eight sockets that can be populated with either 64Kx1RAM
chips or 256K x 1 RAM chips.