Service manual

System Overview 1-77
Figure 1–34 shows the hierarchical switch. For a functional description of the
H-switch, see Section 1.7.3.
The hierarchical switch has eight ports. Each port consists of two unidirectional
buses, one in and one out, each with a 2-Gbyte/second raw bandwidth.
The functions of the hierarchical switch are implemented in six ASICs, two
HSAs for addresses and four HSDs for data. Data arrives at the switch, is
buffered, its destination(s) determined, its commands linked and ordered, and
then passed on at the appropriate time to its destination(s).