Service manual

System Overview 1-29

Figure 1–13 shows the software block diagram for the power system manager.

The PSM is responsible for power on/off, environmental system management,

system initialization, system reset, and system communication in a QBB. Three

C bus controllers control three I

C buses that route throughout the QBB. The

PSM also controls the serial lines to the CPUs used to communicate with

SROM/XSROM code during power-up. Like all other nodes on the CSB it is

Table 1– 3 I

C Bus Device Identification on PSM/QBB

C Bus Devices on the Bus

One hardware monitor on the PSM, up to eight 8-bit expanders, one

on each CPU and each memory, and up to eight 256-byte EEPROMs,

one on each CPU and each memory.

One hardware monitor on the PSM, three 8-bit expanders (one on the

directory module, one on the main power module, and one on the

auxiliary power module), and up to eight 256-byte EEPROMs (one on

each IOP, and one on each of the following: global port, directory

module, main power module, and auxiliary power module).

Three 8-bit expanders on the QBB backplane, one hardware monitor

on the PSM, and two EEPROMs (one on the PSM and the other on

the QBB backplane).

The PSM is controlled by instructions provided by the SCM. When instructed,

the PSM initiates QBB power-up. See Chapter 2.

PSM firmware resides in flash EPROM that can be updated by the SCM

update command or by LFU. See Section 1.12 for a PSM block diagram and

module description.

Note that when an operator issues the SCM show csb command, CPUs and

IOPs are given CSB node addresses though they are not on the CSB. The PSM

in each QBB senses the presence of CPUs and IOPs and knows whether they

are on or off. These CSB node addresses allow operators to target CPUs and

IOPs when using SCM commands. It is the PSM on the CSB that can power on

or off an entire QBB or power on or off CPUs and IOPs individually.