Service manual

C-36 AlphaServer GS80/160/320 Service Manual
Test#
hex
ERROR #
<15:0>
FRU(s) Component Failure Description
Local DTAG error line (FAULT) test
Error# = LMNX
X<0> = 1 always to signify SE testing (no CE or UCE testing here)
X = 3 IOP_QBB_ERR_SUM<fault_sum>=0 meaning a FAULT was not reported
X = 5 IOP_QBB_ERR_SUM<fault_entity> is incorrect (not as expected)
X = 9 IOP_QBB_ERR_SUM<wfj_fault_turned_into_sys_event> bit NOT set!
N = 2 Incorrect IRQ interrupts posted to the CPU
M = 0 QSD Error Summary CSR (CPUx_SE_SUM) was correct
M = 1 Invalid CPU ID in CPUx_SE_SUM
M = 2 No QBB_NUM bits set in CPUx_SE_SUM
M = 4 Incorrect QBB_NUM set in CPUx_SE_SUM
M = 8 More than one QBB_NUM bit set in CPUx_SE_SUM
L = 1 FRU1 is likely the QSD, QSD->CPU path, or CPU
L = 2 FRU1 is likely IOA, QSDy, or IOA->QSDy path (where y=CPU# of Cpu running the test)
L = 4 FRU1 is likely the DTAGx
FRU2 is likely the WFJ
Possible Test 32 Error Numbers (decode based on above chart)
1021
2121, 2221, 2421, 2821
4123,4125,4129 4223, 4225, 4229
4423,4425,4429 4823, 4825, 4829
LMNX QBBx
QBBx
DTGy
DTG0-3
DTG4-7
WFJ
Y=0,1,2,3 for NON-MCM backplane
MCM backplane
MCM backplane
LMNX QBBx IOA, QSDy, path Y=0,1,2,3 based on CPUy running this test
LMNX QBBX
QBBx.CPUy
QSDy Y=0,1,2,3 based on CPUy running this test
32
Parameters for all error numbers:
P1: Data read (FAST read) from CPUx_SE_SUM
P2: Address of CPUx_SE_SUM which was read in P1
P3: Data read from IOP_QBB_ERR_SUM
P4: EV6 ISUM ipr read data
33
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