Service manual

Power-Up Diagnostic Error Table C-27
Test#
hex
ERROR #
<15:0>
FRU(s) Component Failure Description
25,
26,
27,
28
(3
sub-
tests
in
each
test)
contin
ued
SUBTEST 1: Parameters for error numbers 1,2,3,4,5,6
P1: Exp: Data written to MEM_SCRATCH P3: Addr: Failing Address
(MEM_SCRATCH)
P2: Rcvd: Data read back from MEM_SCRATCH after write P4: CPU# (running this test) in
bits <1:0>
SUBTEST 2: Parameters for error numbers xxxF
P1: Mask of failing DIMMx (0..7) on MEMx (x=0,1,2,3) under test
<07:00> = MEM0 DIMM0..7 failures <15:08> = MEM1 DIMM0..7 failures
<23:16> = MEM2 DIMM0..7 failures <31:24> = MEM3 DIMM0..7 failures
P2: Mask of DIMMX (0..7) PRESENCE on MEMx (0..3)
<07:00> = MEM0 DIMM0..7 presence <15:08> = MEM1 DIMM0..7 presence
<23:16> = MEM2 DIMM0..7 presence <31:24> = MEM3 DIMM0..7 presence
P3: Read Data from LAST MEM_SELF_TEST_x CSR read which had a BIST error
P4: Address of CSR read in P3
SUBTEST 2: Parameters for error numbers abcd, dcba
P1: Data from last MEM_MOD_CONFIG CSR read P3: MEMx-under-test which failed
P2: CSR address of last MEM_MOD_CONFIG CSR read P4: CPU# (running test) in bits
<1:0>
SUBTEST 3: Parameters for error numbers LMNX (see chart above)
P1: Data read from CPUx_CE_SUM or CPUx_UCE_SUM P3: Data read from
IOP_QBB_ERR_SUM
P2: Address of CPUx_CE_SUM or CPUx_UCE_SUM read in P1 P4: EV6 ISUM ipr read data
ALL SUBTESTS: Parameters for error number 0099
P1: Received Data read from QSA_PORT_MAP_0 P2: Expected Data written to
QSA_PORT_MAP_0
P3: Address of QSA_PORT_MAP_0 CSR P4: Source Soft QBB ID in bits <2:0>