Service manual

Cache Coherency B-23
Table B– 10 QSA Interface to the Cache Coherency Storage
Interface Description
GPLink -
The global port link (GPLink) is the primary, clock-forwarded
link between the quad switch address ASIC (QSA) and the global
port address ASIC (GPA). This path is used to transmit Q0,
Q0Vic, QIO, Q1 and Q2 packets, bound for remote QBBs, to the
local GPA. The GPLink can transfer one address packet every
two clock cycles.
ArbBus -
The arbiter bus (ArbBus) is the synchronous, serialized, uni-
directional output from the part of the QSA ASIC known as the
quad switch arbiter (QSA QS Arb). The ArbBus is designed as
three separate interconnects: one connecting the QSA to the GPA
(TTT) and directory module, one connecting the QSA to the DTag
and IOP, and one connecting the QSA to the 4 memory modules.
The three interconnects function as one logical bus. The ArbBus
can transmit an address packet every cycle.