Service manual

B-20 AlphaServer GS80/160/320 Service Manual
B.9.3 QBB Duplicate Tag Store (DTag)
There is one DTag store in each QBB in the system. Each DTag store has one
entry for each potential CPU cache location in a QBB. In other words, the DTag
has enough storage to map four CPU module caches.
Table B– 8 DTag Cache Coherency Storage
DTag Field State Description of Field
Status Invalid
no valid data is cached at the associated cache
location
Clean
unmodified data is cached at the associated cache
location. This location may hold the only cached
copy of the data in the system, or it may share the
data with other locations.
Dirty-Not
Probed
modified data is cached at the associated cache
location. Since the data was modified, no other
processor has accessed it. The location contains
the only current copy of the data in the system.
Dirty-
Probed
modified data is cached at the associated cache
location. Since the data was modified, another
processor has accessed it.
Tag NA
identifies the cached memory block; equivalent to
the high order address bits of the cached block
The DTag is accessed exclusively by Only the QBB switch QSA chip has access
to the DTag. The main functions of the DTag are:
1. To provide coherency status for requests to local addresses.
2. To filter probe commands that result from requests to local addresses (i.e., if
the DTag indicates that a processor does not have a copy of a block to which
a probe must be sent, that processor need not be sent the probe).
3. To filter probe commands that result from requests to remote addresses.
The DTag, together with the IOP tag store, form the primary coherency store for
the AlphaServer GS80 with one drawer.