Service manual

B-4 AlphaServer GS80/160/320 Service Manual
B.3 Cache Commands
• Two sets of commands are used to modify cache state:
• Memory space commands
• System probe commands
B.3.1 Memory Space Commands
Table B–3 shows the CPU commands that change the CPU’s cache state when
issued to the system. The commands are assigned a “class” which has a
common effect on the cache state. It is the command class name that is
associated with each cache state change represented by the arrows in Figure B–
1. Table B–3 does not contain a complete list of CPU commands; it lists only
those relevant to AlphaServer GS series cache coherency. Table B–3 also
includes one command, Full Block Write, that is not really a CPU chip command
at all, but a command issued exclusively by the AlphaServer GS series I/O
processor.