Service manual

System Overview 1-21
The memory system functions as a single, distributed, tightly-coupled shared
memory. The system’s memory address space and I/O address space are
distributed in segments across a system’s QBBs. Each memory address maps to
one and only one memory module, on one and only one QBB. Each I/O address
maps to one and only one I/O device, on one and only one QBB. The QBB onto
which a memory or I/O address maps is referred to as that address’ “Home”
QBB.
The 43-bit physical addresses upon which the Alpha chip operates map to a
slightly modified 43-bit physical address format upon which the rest of the
system hardware operates.
Table 1–1 shows the home QBB address ranges as defined by the 43-bit address
range upon which the Alpha chip operates. Note that in memory space, address
bits <38-36> directly decode the home QBB of a memory space address, where
the inverse of address bits <38-36> decode the home QBB of an I/O space
address.
Table 1–2 shows the home QBB address ranges as defined by the 43-bit address
range, after the Alpha chip’s 43-bit addresses have been changed to the address
format used by the rest of the system hardware. Note that in this format,
address bits <38-36> directly decode the home QBB of both memory space and
I/O space references.
The processors in a distributed, tightly-coupled, shared memory system function
as a symmetric multiprocessing (SMP) system. Each processor can operate on
memory data whose home is in the same QBB as the processor or on data whose
home is in a different QBB. When a processor issues a request to an address
whose home is in the same QBB as the processor, the request is referred to as a
“local” request. When a processor issues a request to an address whose home is
in a different QBB, the request is referred to as a “remote” or “global” request.
For a complete discussion of system addressing, see the AlphaServer
GS80/160/320 System Programmer’s Manual.