2-16 AlphaServer GS80/160/320 Service Manual
2.4 Power-Up Test Flow – Phases 2, 3, and 4
During the final three phases, XSROM code assures cache coherency,
assures that all CPUs can access all memory, and leaves all CPUs
running the SRM console.
Figure 2– 4 Power-Up Flowchart - Phase 2, 3, and 4
