Specifications

4–14 Functional Description 9 March 1999 – Subject To Change
System Clocks
Figure 4–6 Interrupt/Interrupt Mask Registers
4.5 System Clocks
Figure 4–7 shows the AlphaPC 164LX clock generation and distribution scheme.
The AlphaPC 164LX system includes input clocks to the microprocessor as well as
clock distribution for the various system memory and I/O devices. There are other
miscellaneous clocks for ISA bus support. System clocking can be divided into the
following three main areas:
• Microprocessor input clock — The input clock runs at the operating frequency
of the 21164 microprocessor. The AlphaPC 164LX supports cycle times from
2.15 ns to 1.67 ns. This implies input clock frequencies from 466 MHz to 600
MHz. The clock is provided by using a synthesizer. The synthesizer’s output is
used as the input clock for the 21164.
• Clock distribution — Clock distribution includes the distribution of system
clocks from the 21164 microprocessor to the system logic. The AlphaPC 164LX
clock distribution scheme is flexible enough to allow the majority of cycle-time
combinations to be supported. Because the PCI is synchronous to the system clock
generated by the 21164 microprocessor, the PCI cycle time is a multiple of the
21164 cycle time. This distribution scheme supports a PCI operation of 33 MHz.
76543210
ISA Address 804
7
7
6
6
5
5
4
4
3
3
2
2
1
1
0
0
ISA Address 805
ISA Address 806
IDE
MK2306-37
INTD0
Reserved
Reserved
INTB0 INTA3 INTA2 INTA1 INTA0SIO
INTC3 INTC2 INTC1 INTC0 INTB3 INTB2 INTB1
Reserved Reserved Reserved Reserved INTD3 INTD2 INTD1