System information

G2T Programmers Guide Rev-A 17-Nov-2014
54
6.1.4. The Event Status Enabled Register (ESER)
In a similar situation, each bit in the standard Event Status Enabled
Register (ESER) corresponds to a bit in the Event Status Register
(ESR, see below). All eight bits in both registers are defined. If at
least one bit in the ESER and its corresponding bit in the ESR are
set, then the ESB bit of the SBR is set, otherwise the ESB is cleared.
The SRER is written to by the *SRE command and read by *SRE?
The Message Available (MAV) bit of the SBR tracks the status of the
standard Output Queue. If there are responses waiting in the
queue, MAV is set, if the queue is empty, MAV is cleared.
In the following example:
STB?;*STB?
The response could possibly be 0;16 or possibly 32;48 (if ESB was
previously set). This is because the first command sees an empty
queue while the second *STB? Sees effect of the first command in
the queue on MAV. Using *STB? To poll MAV is futile. (In order to
read the response from *STB?, you have to address the device to
talk as if MAV is set.)
Again, GPIB behaves differently from serial or TCP/IP. The latter two
immediately sends their responses back to the host on their own
initiative. GPIB, on the other hand, waits until it is addressed to talk.
See below for details on what happens if it’s not address to talk
prior to the arrival of the next command.
6.1.4.1. The ESER under GPIB Control
GPIB behaves differently from serial or TCP/IP. The latter two
immediately send their responses back to the host on their own
initiative. GPIB, on the other hand, waits until it is addressed to talk.
If the bit with weight 16 is set in SRER, then there is a request for
service. Even without that, the host can still perform a serial poll
and from the presence of the 16 in the SBR, it can infer that it
needs to be addressed to talk.