System information

17-Nov-2014 G2T Programmers Guide Rev-A
53
6.1.2.1. Reading the Status Byte Register (SBR)
The SBR is read by issuing the *STB? Common command and
interpreting the response. The response is a decimal number that,
in practice, is be between 0 and 127. The value indicates which of
the five bits are set or cleared. The SBR is read-only.
On GPIB interfaces, the SBR is returned to the host in response to a
serial poll. The 488.1 Request Service bit (RQS) is returned instead of
the MSS bit in this case. For details, please consult the 488.2
standard.
On a technical note, serial polls are handled directly by interface
ASICs without the intervention of the processor. As service requests
are acted upon by the interface ASICs, the moment-by-moment
status of RQS may be changed by the ASIC. MSS, on the other
hand, is changed by the processor only. (Note that the serial poll
causes RQS to clear but has no direct effect on MSS.)
6.1.3. The Service Request Enable Register (SRER)
The standard Service Request Enable Register (SRER) can be read
by the common *SRE? Command and written by the *SRE
command. With the exception of the bit with weight 64, each bit
in the SRER corresponds to a bit in the SBR. In general, if at least
one bit in the SRER is set and its corresponding bit in the SBR is also
set, then MSS is set. Otherwise, MSS is cleared.
As an example, if the bit with weight 16 is set in the SRER, then MSS
is set whenever MAV is set. Any of the following are examples of
commands which set SRER that way: *SRE 16; *SRE 48; *SRE 56. The
bit with weight 64 (which corresponds to the MSS itself) is ignored.
In this implementation, all unused and undefined bits are always
zero.
As an example, the response from *SRE 255; *SRE? Is 56 unless one
of the above mentioned bits has been designated to support a
project specific function which shall be documented separately.