System information

G2T Programmers Guide Rev-A 17-Nov-2014
52
6.1.2. The Status Byte Register (SBR)
The current bit status is summarized in the standard Status Byte
Register (SBR). The SBR consists of the following bits with the
following weights:
•
The standard Master Summary Status
(MSS, numeric weight of 64) – this bit is dependent on the
state of the other bits of the register and the current value
of the Service Request Enable Register (SRER, see below for
details on it and how the MSS is determined).
•
The standard Event Status Bit
(ESB, numeric weight of 32) – this bit is dependent on the
state of the Event Status Register (ESR) and the current
value of Event Status Enable Register (ESER) (see below for
both).
•
The standard Message Available bit
(MAV, numeric weight of 16) – this bit is set when the
Output Queue (see below) has responses for the host in it.
It gets cleared when it’s empty.
•
The Fault bit
(FLT, numeric weight of 8) – this bit is set when there are
faults recorded in the Fault Queue (see below). The usage
of this bit is defined by Universal Switching.
•
The Power Supply Fault bit
(PSFLT, numeric weight of 4) – this bit is set and cleared as
faults are found or cleared in the power supplies.
The remaining bits (numeric weights 128, 2 and 1) are not defined
by either 488.2 or Universal Switching Corp. They are currently
always cleared. Universal Switching Corp reserves the right to use
the undefined bits in the future or in project-specific applications. It
is suggested that your host application mask these bits out.