User guide

CIF Peripheral Model - SimpleTimer
CoMET Version 5.9 – Tutorial 81
Specification
• The SimpleTimer is a 32 bit general purpose timer
• The SimpleTimer has two general purpose match registers
• Each match can be individually enable and disabled
• Each match event can generate an interrupt
• The interrupts for each match can be disabled and enabled
• The current timer value can be written at any time from the bus
• Each interrupt shall have its own flag
• The match registers shall cause a match only when the counter value equals the match
register value and the match is enabled
• The match interrupt associated with a match shall stay high until it is explicitly cleared
• The timer shall clear all registers upon a reset (effectively disabling the counter and
interrupts)
SimpleTimer Diagram
The SimpleTimer device
SimpleTimer Device
MatchInterrupt2
Reset
TimerClock
Bus
BusClock
GTR - General Timer Register
MTR1 - Match Timer Register 1
MTR2 - Match Timer Register 2
TER - Timer Enable Register
TIER - Timer Interrupt Enable Register
TIFR - Timer Interrupt Flag Register
MatchInterrupt1