User guide

CIF Peripheral Model - SimpleTimer
CoMET Version 5.9 – Tutorial 115
VSP and SimpleTimer Block Diagram
The SimpleVSP project with an instance of SimpleTimer added
Changes from the original SimpleVSP project are shown in blue.
A
rm926ejs1
Irq
Clock
InstBus
DataBus DataBusClock
InstBusClock
GenericMemory1
Reset
BusClock
Bus
V
astGpStdLogic01
V
astGpReset1
Reset
V
astGpClock1
Clock
ClockNet
ResetNet
V
irtual System Prototype - SimpleVSP1
V
irtual Platform - VirtualPlatform1
StdLogic0Net
StdBus1
Bus
SignalOut BusClockIn
StdBus1Net
StdBus1ClockNet
PlatformClock
PlatformReset
Fiq
Reset
SimpleTimer1
Bus
Reset
MatchInterrupt2
MatchInterrupt1
TimerClock
IrqNet
BusClock