User manual

Code Mercenaries
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5.1.6 Register 10: LED Status (read only)
Values are valid only after performing a check
command (register 12, bit 7)
Bit 0 - Channel 1 status 0
Bit 1 - Channel 1 status 1
Bit 2 - Channel 2 status 0
Bit 3 - Channel 2 status 1
Bit 4 - Channel 3 status 0
Bit 5 - Channel 3 status 1
Bit 6 - Channel 4 status 0
Bit 7 - Channel 4 status 1
The two bits contain the status for a channel:
0b00 - normal function
0b01 - open circuit or undervoltage
0b10 - unused, may be used for future function
0b11 - unable to test, the channel was switched off
(see register 11)
5.1.7 Register 11: Controller Mode 1
Bit 0 - Activate channel 1 driver (1 = active)
Bit 1 - Activate channel 2 driver (1 = active)
Bit 2 - Activate channel 3 driver (1 = active)
Bit 3 - Activate channel 4 driver (1 = active)
Bit 4 - Dimming source 0
Bit 5 - Dimming source 1
Bit 6 - Activate sync mode
Bit 7 - Enable current setting
Dimming source selects which bus is active or if an
autonomous sequence controls the channels:
0b00 - I2C
0b01 - DMX512
0b10 - DALI
0b11 - Sequence Mode
Activate sync mode selects synchronized dimming
mode when set to 1. If sync mode is enabled any
values written to registers 6…9 are used after
receiving a broadcast $0A I2C command. This
allows to switch multiple LED-Warrior04 to new
brightness values simultaneously to avoid a wave
effect that would occur with sequential writing.
Enable current setting has to be set to "1" prior to
any writes to registers 2-5. This is intended to
prevent accidentially setting current values that
may damage the connected LEDs. Writing to any
other register than a channel current register does
reset this bit.
5.1.8 Register 12: Controller Mode 2
Bit 0 - unused, always write as 0
Bit 1 - unused, always write as 0
Bit 2 - unused, always write as 0
Bit 3 - unused, always write as 0
Bit 4 - unused, always write as 0
Bit 5 - Sequence write, enables writing register 15
Bit 6 - DMX linear (1 = disable logarithmic curve)
Bit 7 - Test channels, sets the flags for register 10
Sequence write has to be set to enable writing a
new sequence table via register 15. Writing to any
other register than 12 or 15 resets this bit.
Completing the write of a sequence table also
resets this bit.
DMX linear allows to disable the default
logarithmic mapping of DMX 8 bit dimming value
to 12 bit PWM values. If this bit is set the DMX
values will be multiplied by 16 to generate the
PWM values. Default is that the DMX values are
mapped via a logarithmic table to get a
physilogically optimized dimming curve.
Test channels generates a 2 ms current pulse on all
enabled channels to test for short or open circuit
conditions. Writing this bit as 1 performs the test,
sets the bits in register 10 and resets the test
channels bit.
5.1.9 Register 13: DMX512 Start Slot
This 9-bit little endian value will be used as the
first slot number of four consecutive DMX slots
which will be used to set the PWM channels if
DMX512 is set as dimming input in register 11
(Controller Mode 0)
5.1.10 Register 14: Flash Write (write only)
Register 14 allows to write the current settings to
the flash memory. On the next power up reset the
settings will be retrieved from flash memory and
used as default.
Bit 0 - unused, always write as 0
Bit 1 - unused, always write as 0
Bit 2 - Store sequence table in flash
Bit 3 - Store DMX start slot number in flash
Bit 4 - Store controller mode in flash
Bit 5 - Store PWM values in flash
Bit 6 - Store current values in flash
Bit 7 - Restore values from flash
Writing any of the bits as "1" does cause the
corresponding currently active parameters to be
written to flash memory.
Writing $80 to this register performs a soft reset.
All controller variables are set to the values stored
in flash memory.
V0.8.0 June 15th 2015 Draft