User manual

Code Mercenaries
15
II
II
OO
OO
--
--
WW
WW
aa
aa
rr
rr
rr
rr
ii
ii
oo
oo
rr
rr
Any write transactions are acknowledged by a
report via interrupt-in endpoint 2:
flags contains the following bits:
7 - Error bit, 1=error
6 - unused, zero
5 - unused, zero
4 - unused, zero
3 - unused, zero
2 - data count MSB
1 - data count
0 - data count LSB
"data count" indicates the last byte that was
successfully transfered and acknowledged by the
slave (if any). An error is indicated when the slave
does not acknowledge a transfer.
Reading data off the IIC is initiated with a
ReportID=3. The initiating report has the following
format:
"command" holds the command byte to be send to
the IIC. "count" is the number of bytes that should
be read off the IIC after sending the command
byte, values 1 to 255 are valid.
A start signal is automatically generated before
sending the command byte and a stop is generated
after the last data byte is received.
Data is returned in input reports with ID=3 (which
is different from the output ReportID=3 used to
initiate the read transaction) via endpoint 2. The
data is returned in chunks of up to six bytes each
with an error flag and byte count. Multiple reports
may be returned in reaction to a read request:
flags contains the following bits:
7 - error, set if slave does not ack command byte
6 - unused, zero
5 - unused, zero
4 - unused, zero
3 - unused, zero
2 - data count MSB
1 - data count
0 - data count LSB
Should the IIC slave fail to acknowledge the
command byte the error flag will be set and the
transaction aborted. IIC does not have an error
condition during the actual reading of data after the
command byte was sent.
Clock stretching handshake, timeout, Sensibus
option and disabling pull-up resistors have been
added with chip revision V1.0.3.0 and are not
available with older chips.
ReportID
$02 in
12
flags $00
34
$00 $00
56
$00 $00
7
$00
ReportID
$03 out
12
count command
34
$00 $00
56
$00 $00
7
$00
ReportID
$03 in
12
flags data
34
data data
56
data data
7
data
V 1.1.0, December 2nd 2013, for chip revision V1.0.3.0 and up