Datasheet

M2Y1G64TU88D0B / M2Y2G64TU8HD0B / M2Y1G64TU88D4B / M2Y2G64TU8HD4B / M2Y1G64TU88D4B
M2Y1G64TU88D5B / M2Y2G64TU8HD5B / M2Y1G64TU88D6B / M2Y2G64TU8HD6B
M2Y1G64TU88D7B
1GB: 128M x 64 / 2GB: 256M x 64
Unbuffered DDR2 SDRAM DIMM
REV 1.2 15
10/2008
© NANYA TECHNOLOGY CORP.
NANYA TECHNOLOGY CORP. reserves the right to change Products and Specifications without notice.
AC Timing Specifications for DDR2 SDRAM Devices Used on Module
(T
CASE
= 0 °C ~ 85 °C; V
DDQ
= 1.8V ± 0.1V; V
DD
= 1.8V ± 0.1V, See AC Characteristics) (Part 2 of 2)
Symbol
Parameter
PC2-5300
PC2-6400
Unit
Min.
Max.
Min.
Max.
Txard
Exit active power down to read command
2
-
2
-
Nck
Txards
Exit active power down to read command
7-AL
8-AL
Nck
Taond
ODT turn-on delay
2
2
2
2
Nck
Taon
ODT turn-on
Tac (min)
Tac (max)+0.7
Tac (min)
Tac (max)+0.7
ns
Taonpd
ODT turn-on (Power down mode)
Tac (min) +2
2Tck +
Tac(max) +1
Tac (min) +2
2Tck +
Tac(max) +1
ns
Taofd
ODT turn-off delay
2.5
2.5
2.5
2.5
Nck
Taof
ODT turn-off
Tac(min)
Tac(max)
+0.6
Tac(min)
Tac(max)
+0.6
ns
Taofpd
ODT turn-off (Power down mode)
Tac (min)+2
2.5Tck +
Tac(max) +1
Tac (min)+2
2.5Tck +
Tac(max) +1
ns
Tanpd
ODT to power down entry latency
3
-
3
-
Nck
Taxpd
ODT power down exit latency
8
8
Nck
Tmrd
Mode register set command cycle time
2
-
2
-
Nck
Tmod
MRS command to ODT update delay
0
12
0
12
ns
Toit
OCD drive mode output delay
0
12
0
12
ns
tDelay
Minimum time clocks remains ON after CKE
asynchronously drops Low
Tis + Tck + Tih
-
Tis + Tck + Tih
-
ns
Trfc
Refresh to active/Refresh command time
127.5
127.5
ns
Trefi
Average Periodic Refresh Interval
(85ºC < T
CASE
≤ 95ºC)
3.9
3.9
μs
Average Periodic Refresh Interval
(0ºC ≤ T
CASE
≤ 85ºC)
7.8
7.8
μs
Speed Grade Definition
Symbol
Parameter
PC2-5300
PC2-6400
Unit
Min
Max
Min
Max
Tras
Row Active Time
45
70,000
45
70,000
ns
Trc
Row Cycle Time
60
-
57.5
-
ns
Trcd
RAS to CAS delay
15
-
12.5
-
ns
Trp
Row Precharge Time
15
-
12.5
-
ns