Service manual

Schematic Diagrams
B - 10 Cantiga 6/6 - GND
B.Schematic Diagrams
Cantiga 6/6 - GND
XOR Mode Enable
Disable
LO W
R40 * 2.2K_1%_04
Lanes Reversed
R3 8 * 1 0m il_ s h ort
DMI Lane Reversal
LO W
MCH_CFG13
Reserved
LOW
MC H_ CF G 1 3 [5]
R37 * 2.2K_1%_04
LOW :
HIGH:
EnableHIGH:
MC H_ CF G 1 9 [5]
Nomal Operation
R3 9 2 .2 K_ 1% _ 04
HIGH
Enable
Normal operation
PCIE Loopback Enable
MC H_ CF G 1 0 [5]
HIGH
R34 * 2.2K_1%_04
LOW :
DMI=4
iTPM Host Interface
R228 * 2.2K_1%_04
ATM Firmware use TLS cipher
suite with no
confidentiality
Disable
Default
LOW :
HIGH:
3.3VS
HIGH:
R31 * 2.2K_1%_04
MCH_CFG12
ATM Firmware use TLS cipher
suite with confidentiality
MC H_ CF G 7 [5 ]
Reverse Lane
Default
Digital Display Port
All-Z Mode Enable
R33 * 2.2K_1%_04
HIGH
MC H_ CF G 1 6 [5]
R4 6 * 1 0m il_ s h ort
VSS
U15I
C ANTIG A-EB8 8C TG M
AU 48
A23
AR 48
AL48
BB47
AW47
AN 47
AJ 47
AF47
AD 47
AB47
Y47
T47
N47
L47
G47
BD 46
BA46
AV46
AR 46
AM 46
V46
R46
P46
H46
F46
BF44
AH 44
AD 44
AA44
Y44
U44
T44
M44
F44
BC 43
AV43
AU 43
AM 43
J43
C43
BG 42
AY 42
AT42
AN 42
AJ 42
AE42
N42
L42
BD 41
AU 41
AM 41
AH 41
AD 41
AA41
Y41
U41
T41
M41
G41
B41
BG 40
BB40
AV40
AN 40
H40
E40
AT39
AM 39
AJ 39
AE39
N39
L39
B39
BH 38
BC 38
BA38
AU 38
AH 38
AD 38
AA38
Y38
U38
T38
J38
F38
C38
BD 36
AM3 6
AE36
P36
L36
J36
F36
B36
AH35
AA35
Y35
U3 5
T35
BF3 4
AM3 4
AJ 34
AF3 4
AE34
W34
B34
A34
BG33
BC33
BA33
AV33
AR33
AL33
AH33
AB33
P33
L33
H3 3
N3 2
K32
F32
C3 2
A31
AN29
T29
N2 9
K29
H2 9
F29
A29
BG28
BD28
BA28
AV28
AT28
AR28
AJ 28
AG28
AE28
AB28
Y28
P28
K28
H2 8
F28
C2 8
BF2 6
AH26
AF2 6
AB26
AA26
C2 6
B26
BH25
BD25
BB25
AV25
AR25
AJ 25
AC25
Y25
N2 5
L25
J25
G2 5
E25
BF2 4
BF37
BB37
AW37
AT37
AN 37
AJ 37
H37
C37
BG 36
AU 36
AT24
AH24
AB24
L24
AY 46
G2 4
E24
AG23
B23
AY24
AJ 24
AF2 4
R2 4
K24
J24
F24
BH23
Y23
AK15
AD12
AJ 6
VSS_1
VSS_19 8
VSS_2
VSS_3
VSS_4
VSS_5
VSS_6
VSS_7
VSS_8
VSS_9
VSS_10
VSS_11
VSS_12
VSS_13
VSS_14
VSS_15
VSS_16
VSS_17
VSS_19
VSS_20
VSS_21
VSS_22
VSS_23
VSS_24
VSS_25
VSS_26
VSS_27
VSS_28
VSS_29
VSS_30
VSS_31
VSS_32
VSS_33
VSS_34
VSS_35
VSS_36
VSS_37
VSS_38
VSS_39
VSS_40
VSS_41
VSS_42
VSS_43
VSS_44
VSS_45
VSS_46
VSS_47
VSS_48
VSS_49
VSS_50
VSS_51
VSS_52
VSS_53
VSS_54
VSS_55
VSS_56
VSS_57
VSS_58
VSS_59
VSS_60
VSS_61
VSS_62
VSS_63
VSS_64
VSS_65
VSS_66
VSS_67
VSS_68
VSS_69
VSS_70
VSS_71
VSS_72
VSS_73
VSS_74
VSS_75
VSS_76
VSS_77
VSS_78
VSS_79
VSS_80
VSS_81
VSS_82
VSS_83
VSS_84
VSS_85
VSS_86
VSS_87
VSS_97
VSS_10 0
VSS_10 1
VSS_10 2
VSS_10 3
VSS_10 4
VSS_10 5
VSS_10 6
VSS_10 7
VSS_10 8
VSS_10 9
VSS_11 0
VSS_11 1
VSS_11 2
VSS_11 3
VSS_11 4
VSS_11 5
VSS_11 6
VSS_11 7
VSS_11 8
VSS_11 9
VSS_12 0
VSS_12 1
VSS_12 2
VSS_12 3
VSS_12 4
VSS_12 5
VSS_12 6
VSS_12 7
VSS_12 8
VSS_12 9
VSS_13 0
VSS_13 1
VSS_13 2
VSS_13 3
VSS_13 4
VSS_13 5
VSS_13 6
VSS_13 7
VSS_13 8
VSS_13 9
VSS_14 0
VSS_14 1
VSS_14 2
VSS_14 3
VSS_14 4
VSS_14 5
VSS_14 6
VSS_14 7
VSS_14 8
VSS_14 9
VSS_15 0
VSS_15 1
VSS_15 2
VSS_15 3
VSS_15 4
VSS_15 5
VSS_15 6
VSS_15 7
VSS_15 8
VSS_15 9
VSS_16 0
VSS_16 1
VSS_16 2
VSS_16 3
VSS_16 4
VSS_16 5
VSS_16 6
VSS_16 7
VSS_16 8
VSS_16 9
VSS_17 0
VSS_17 1
VSS_17 2
VSS_17 3
VSS_17 4
VSS_17 5
VSS_17 6
VSS_17 7
VSS_17 8
VSS_17 9
VSS_88
VSS_89
VSS_90
VSS_91
VSS_92
VSS_93
VSS_94
VSS_95
VSS_96
VSS_99
VSS_18 2
VSS_18 4
VSS_18 6
VSS_18 8
VSS_18
VSS_19 1
VSS_19 3
VSS_19 5
VSS_19 7
VSS_18 1
VSS_18 3
VSS_18 5
VSS_18 7
VSS_18 9
VSS_19 0
VSS_19 2
VSS_19 4
VSS_19 6
VSS_98
VSS_18 0
VSS_19 9
Default
Intel Management Engine Crypto Strap
PCIE Graphics Lane
MC H_ CF G 6 [5 ]
MC H_ CF G 9 [5 ]
Default
HIGH:
MC H_ CF G 5 [5 ]
Default
Default
R5 6 * 1 0m il_ s h ort
MC H_ CF G 1 2 [5]
Normal
LOW :
LOW :
R4 1 * 1 0m il_ s h ort
Digital Display Port
(SDVO/DP/iHDMI) and PCIE
are operational simultaneously
via PEG port
Default
Disable
R36 * 2.2K_1%_04
R 5 1 * 4. 0 2 K _ 1% _ 0 4
DMI X2 Select
LOW :
HIGH:
Enable
Default
FSB Dynamic ODT
HIGH
Only Digital Display Port
(SDVO/DP/iHDMI) or PCIE
is operational
Default
VSS
VS S NCT F
VSS SCB
NC
U1 5 J
CANTIGA-EB88CTGM
BG 2 1
AW 2 1
AU 2 1
AP2 1
AN 2 1
AH 2 1
AF2 1
AB2 1
R21
M21
J21
G21
BC 2 0
BA2 0
AW 2 0
AT2 0
AJ 2 0
AG 2 0
Y20
N20
K20
F20
C20
A20
BG 1 9
A18
BG 1 7
BC 1 7
AW 1 7
AT1 7
R17
M17
H17
C17
BA1 6
AU 1 6
AN 1 6
N16
K16
G16
E16
BG 1 5
W15
A15
BG 1 4
AA1 4
C14
BG 1 3
BC 1 3
BA1 3
AN 1 3
AJ 1 3
AE1 3
N13
L13
G13
E13
BF1 2
AV1 2
AT1 2
AM 1 2
AA1 2
J12
A12
BD 1 1
BB1 1
AY 11
AN 1 1
AH 1 1
Y11
N11
G11
C11
BG 1 0
AV1 0
AT1 0
AJ 1 0
AE1 0
AA1 0
BH 8
B9
G9
AD 9
AM 9
AN 9
BC 9
M10
BF 9
AH8
Y8
L8
E8
B8
AY7
AU7
AN7
AJ7
AE7
AA7
N7
J7
BG6
BD6
AV6
AT6
AC 1 5
AM6
M6
C6
BA5
AH5
AD5
Y5
L5
J5
H5
F5
BE4
BC3
AV3
AL3
AF32
AB32
V32
AJ3 0
AM2 9
AF29
AB29
U2 6
U2 3
AL20
V20
AC19
AL17
AJ1 7
AA17
U1 7
BH48
BH1
A48
C1
A3
E1
D2
C3
B4
A5
A6
A43
A44
B45
C4 6
D4 7
B47
A46
F48
E48
C4 8
B48
R3
P3
BA2
AR2
AU2
AP2
F3
AW 2
AE2
AF2
AH2
AJ2
AD2
AC2
Y2
M2
K2
AM1
AA1
P1
H1
BB 8
AV 8
AT8
U2 4
U2 8
U2 5
U2 9
L12
VS S_1 9 9
VS S_2 0 1
VS S_2 0 2
VS S_2 0 3
VS S_2 0 4
VS S_2 0 5
VS S_2 0 6
VS S_2 0 7
VS S_2 0 8
VS S_2 0 9
VS S_2 1 0
VS S_2 1 1
VS S_2 1 2
VS S_2 1 3
VS S_2 1 4
VS S_2 1 5
VS S_2 1 6
VS S_2 1 7
VS S_2 1 8
VS S_2 1 9
VS S_2 2 0
VS S_2 2 1
VS S_2 2 2
VS S_2 2 3
VS S_2 2 4
VS S_2 2 5
VS S_2 2 6
VS S_2 2 7
VS S_2 2 8
VS S_2 2 9
VS S_2 3 0
VS S_2 3 1
VS S_2 3 2
VS S_2 3 3
VS S_2 3 5
VS S_2 3 7
VS S_2 3 8
VS S_2 3 9
VS S_2 4 0
VS S_2 4 1
VS S_2 4 2
VS S_2 4 3
VS S_2 4 5
VS S_2 4 6
VS S_2 4 7
VS S_2 4 8
VS S_2 4 9
VS S_2 5 0
VS S_2 5 1
VS S_2 5 2
VS S_2 5 5
VS S_2 5 6
VS S_2 5 7
VS S_2 5 8
VS S_2 5 9
VS S_2 6 0
VS S_2 6 1
VS S_2 6 2
VS S_2 6 3
VS S_2 6 4
VS S_2 6 5
VS S_2 6 6
VS S_2 6 7
VS S_2 6 8
VS S_2 6 9
VS S_2 7 0
VS S_2 7 1
VS S_2 7 2
VS S_2 7 3
VS S_2 7 5
VS S_2 7 6
VS S_2 7 7
VS S_2 7 8
VS S_2 7 9
VS S_2 8 0
VS S_2 8 1
VS S_2 8 2
VS S_2 8 3
VS S_2 8 4
VS S_2 9 3
VS S_2 9 2
VS S_2 9 1
VS S_2 9 0
VS S_2 8 9
VS S_2 8 8
VS S_2 8 7
VS S_2 8 5
VS S_2 8 6
VS S_2 9 7
VS S_2 9 8
VS S_2 9 9
VS S_3 0 0
VS S_3 0 1
VS S_3 0 2
VS S_3 0 3
VS S_3 0 4
VS S_3 0 5
VS S_3 0 6
VS S_3 0 7
VS S_3 0 8
VS S_3 0 9
VS S_3 1 0
VS S_3 1 1
VS S_3 1 2
VS S_3 1 3
VS S_2 4 4
VS S_3 1 4
VS S_3 1 5
VS S_3 1 6
VS S_3 1 7
VS S_3 1 8
VS S_3 1 9
VS S_3 2 0
VS S_3 2 1
VS S_3 2 2
VS S_3 2 3
VS S_3 2 4
VS S_3 2 5
VS S_3 2 7
VS S_3 2 8
VS S_3 2 9
V SS_N CTF_1
V SS_N CTF_2
V SS_N CTF_3
V SS_N CTF_4
V SS_N CTF_5
V SS_N CTF_6
V SS_N CTF_7
V SS_N CTF_8
V SS_N CTF_9
VSS_NC TF_ 1 0
VSS_NC TF_ 1 1
VSS_NC TF_ 1 2
VSS_NC TF_ 1 3
VSS_NC TF_ 1 4
VSS_NC TF_ 1 5
VSS_NC TF_ 1 6
VSS_S CB_1
VSS_S CB_2
VSS_S CB_3
VSS_S CB_4
VSS_S CB_5
NC_26
NC_27
NC_28
NC_29
NC_30
NC_31
NC_32
NC_33
NC_34
NC_35
NC_36
NC_37
NC_38
NC_39
NC_40
NC_41
NC_42
VS S_3 3 0
VS S_3 3 1
VS S_3 3 3
VS S_3 3 6
VS S_3 3 5
VS S_3 3 7
VS S_3 3 2
VS S_3 3 4
VS S_3 4 1
VS S_3 4 0
VS S_3 3 9
VS S_3 3 8
VS S_3 4 2
VS S_3 4 3
VS S_3 4 4
VS S_3 4 5
VS S_3 4 6
VS S_3 4 7
VS S_3 4 8
VS S_3 4 9
VS S_3 5 0
VS S_2 9 4
VS S_2 9 5
VS S_2 9 6
VS S_3 5 1
VS S_3 5 2
VS S_3 5 3
VS S_3 5 4
VS S_2 0 0
MC H_ CF G 2 0 [5]
HIGH:
LOW
3.3V S[5,8 ,1 0 ..16 ,1 8. .27 ,3 1]
LOW :
HIGH:
DMI=2
Configuration
R 5 0 * 4. 0 2 K _ 1% _ 0 4
LOW :
Sheet 9 of 40
Cantiga 6/6 - GND