User Guide

Schematic Diagrams
B - 4 Intel Penryn (Socket-P) 2/2
B.Schematic Diagrams
Intel Penryn (Socket-P) 2/2
C311
0.1U_10V_X7R_04
C301
1U _6.3V_04
C309
0.1U _10V _X7R _04
C283
10U_6.3V_X5R_08
H_VID4 [31]
C3 3 0
22U _6.3V _X5R _08
C2 9 6
1U _6.3V_04
1.5VS[8 ,13 ,1 4 ,1 6 ,1 9 ,2 0, 29 ]
VCO R E
C3 3 2
1U_6.3V_04
1.05V S
C31
0.1U_10V_X7R_04
C38
22U_6.3V_X5R_08
C2 9 9
0. 01 U _ 16 V _X 7 R _0 4
1.05VS
H_VID3 [31]
C PU_VS SSEN SE [31 ]
C308
* 0 .1U_ 1 0 V_ X7 R_04
C322
22U_6.3V_X5R_08
C2 9 1
0.01U _16V_X7R _04
C327
10U_6.3V_X5R_08
VC OR E[31 ]
C321
10U _6.3V _X5R _08
C3 2 3
10U _6.3V _X5R _08
C279
0.1U _10V_X7R_04
C305
1U _6.3V _04
C334
1U _6.3V_04
C316
0.1U _10V_X7R_04
U9 C
MO LEX_47430-6215
.
A7
A9
A10
A12
A13
A15
A17
A18
A20
B7
B9
B10
B12
B14
B15
B17
B18
B20
C9
C1 0
C1 2
C1 3
C1 5
C1 7
C1 8
D9
D1 0
D1 2
D1 4
D1 5
D1 7
D1 8
E7
E9
E10
E12
E13
E15
E17
E18
E20
F7
F9
F10
F12
F14
F15
F17
F18
F20
AA7
AA9
AA10
AA12
AA13
AA15
AA17
AA18
AA20
AB9
AC10
AB10
AB12
AB14
AB15
AB17
AB18
AB20
AB7
AC7
AC9
AC12
AC13
AC15
AC17
AC18
AD7
AD9
AD10
AD12
AD14
AD15
AD17
AD18
AE9
AE10
AE12
AE13
AE15
AE17
AE18
AE20
AF9
AF1 0
AF1 2
AF1 4
AF1 5
AF1 7
AF1 8
AF2 0
B26
J6
K6
M6
J2 1
K21
M2 1
N2 1
N6
R2 1
R6
T2 1
T6
V21
W21
AF7
AD6
AF5
AE5
AF4
AE3
AF3
AE2
AE7
C2 6
G2 1
V6
VCC[001]
VCC[002]
VCC[003]
VCC[004]
VCC[005]
VCC[006]
VCC[007]
VCC[008]
VCC[009]
VCC[010]
VCC[011]
VCC[012]
VCC[013]
VCC[014]
VCC[015]
VCC[016]
VCC[017]
VCC[018]
VCC[019]
VCC[020]
VCC[021]
VCC[022]
VCC[023]
VCC[024]
VCC[025]
VCC[026]
VCC[027]
VCC[028]
VCC[029]
VCC[030]
VCC[031]
VCC[032]
VCC[033]
VCC[034]
VCC[035]
VCC[036]
VCC[037]
VCC[038]
VCC[039]
VCC[040]
VCC[041]
VCC[042]
VCC[043]
VCC[044]
VCC[045]
VCC[046]
VCC[047]
VCC[048]
VCC[049]
VCC[050]
VCC[051]
VCC[052]
VCC[053]
VCC[054]
VCC[055]
VCC[056]
VCC[057]
VCC[058]
VCC[059]
VCC[060]
VCC[061]
VCC[062]
VCC[063]
VCC[064]
VCC[065]
VCC[066]
VCC[067]
VC C[ 068]
VC C[ 069]
VC C[ 070]
VC C[ 071]
VC C[ 072]
VC C[ 073]
VC C[ 074]
VC C[ 075]
VC C[ 076]
VC C[ 077]
VC C[ 078]
VC C[ 079]
VC C[ 080]
VC C[ 081]
VC C[ 082]
VC C[ 083]
VC C[ 084]
VC C[ 085]
VC C[ 086]
VC C[ 087]
VC C[ 088]
VC C[ 089]
VC C[ 090]
VC C[ 091]
VC C[ 092]
VC C[ 093]
VC C[ 094]
VC C[ 095]
VC C[ 096]
VC C[ 097]
VC C[ 098]
VC C[ 099]
VC C[ 100]
VC CA[01]
VC CP[03]
VC CP[04]
VC CP[05]
VC CP[06]
VC CP[07]
VC CP[08]
VC CP[09]
VC CP[10]
VC CP[11]
VC CP[12]
VC CP[13]
VC CP[14]
VC CP[15]
VC CP[16]
V CC SEN SE
VI D[0]
VI D[1]
VI D[2]
VI D[3]
VI D[4]
VI D[5]
VI D[6]
VS SSEN SE
VC CA[02]
VC CP[01]
VC CP[02]
C320
22U _6.3V _X5R _08
C39
1U _6.3V _04
C315
* 0 .1U_1 0 V_ X7R _0 4
VCO R E
VC OR E
H_VID1 [31]
H_VID2 [31]
C319
10U _6.3V_X5R_08
1. 05 V S[2,4 ,5 ,7, 8, 13 ,1 6 ,2 9]
C281
22U _6.3V_X5R_08
C35
* 0. 1U _10V _X7R _04
C324
1U_6.3V_04
C3 1 3
15 0 U _ 4V _B 2
C295
1U _6.3V _04
C304
0.1U_10V_X7R_04
H_VID0 [31]
VCO R E
VCO R E
C302
1U _6.3V _04
1.05VS
C2 8 0
22U _6.3V _X5R _08
Layout Note:
C36
22U_6.3V_X5R_08
C282
10U_6.3V_X5R_08
C333
22U_6.3V_X5R_08
0.5A
C362
0.1U_10V_X7R_04
C278
1U_6.3V_04
H_VID6 [31]
47A
C1 7
0.1U_10V_X7R _04
C331
0.1U_10V_X7R_04
H_VID5 [31]
C328
0.01U_16V_X7R_04
VCO R E
C298
0.1U _10V _X7R _04
C3 2 9
1U _6.3V_04
2.5A
U9D
M O LE X_ 4 7 4 3 0- 62 1 5
.
P6
AE11
A8
A11
A14
A16
A19
A23
AF2
B6
B8
B11
B13
B16
B19
B21
B24
C5
C8
C1 1
C1 4
C1 6
C1 9
C2
C2 2
C2 5
D1
D4
D8
D1 1
D1 3
D1 6
D1 9
D2 3
D2 6
E3
E6
E8
E11
E14
E16
E19
E21
E24
F5
F8
F11
F13
F16
F19
F2
F22
F25
G4
G1
G2 3
G2 6
H3
H6
H2 1
H2 4
J2
J5
J22
J25
K1
K4
K23
K26
L3
L6
L21
L24
M2
M5
M2 2
M2 5
N1
N4
N2 3
N2 6
P3 A25
AF2 1
AF1 9
AF1 6
AF1 3
AF1 1
AF8
AF6
A2
AE26
AE23
AE19
P21
P24
R2
R5
R2 2
R2 5
T1
T4
T23
T26
U3
U6
U2 1
U2 4
V2
V5
V22
V25
W1
W4
W23
W26
Y3
Y21
Y24
AA2
AA5
AA8
AA11
AA14
AA16
AA19
AA22
AA25
AB1
AB4
AB8
AB11
AB13
AB16
AB19
AB23
AB26
AC 3
AC 6
AC 8
AC 11
AC 14
AC 16
AC 19
AC 21
AC 24
AD 2
AD 5
AD 8
AD 11
AD 13
AD 16
AD 19
AD 22
AD 25
AE1
AE4
Y6
A4
AE14
AE16
AE8
AF2 5
VSS [0 82 ]
VSS [1 48 ]
VS S[0 0 2]
VS S[0 0 3]
VS S[0 0 4]
VS S[0 0 5]
VS S[0 0 6]
VS S[0 0 7]
VS S[0 0 8]
VS S[0 0 9]
VS S[0 1 0]
VS S[0 1 1]
VS S[0 1 2]
VS S[0 1 3]
VS S[0 1 4]
VS S[0 1 5]
VS S[0 1 6]
VS S[0 1 7]
VS S[0 1 8]
VS S[0 1 9]
VS S[0 2 0]
VS S[0 2 1]
VS S[0 2 2]
VS S[0 2 3]
VS S[0 2 4]
VS S[0 2 5]
VS S[0 2 6]
VS S[0 2 7]
VS S[0 2 8]
VS S[0 2 9]
VS S[0 3 0]
VS S[0 3 1]
VS S[0 3 2]
VS S[0 3 3]
VS S[0 3 4]
VS S[0 3 5]
VS S[0 3 6]
VS S[0 3 7]
VS S[0 3 8]
VS S[0 3 9]
VS S[0 4 0]
VS S[0 4 1]
VS S[0 4 2]
VS S[0 4 3]
VS S[0 4 4]
VS S[0 4 5]
VS S[0 4 6]
VS S[0 4 7]
VS S[0 4 8]
VS S[0 4 9]
VS S[0 5 0]
VS S[0 5 1]
VS S[0 5 2]
VS S[0 5 3]
VS S[0 5 4]
VS S[0 5 5]
VS S[0 5 6]
VS S[0 5 7]
VS S[0 5 8]
VS S[0 5 9]
VS S[0 6 0]
VS S[0 6 1]
VS S[0 6 2]
VS S[0 6 3]
VS S[0 6 4]
VS S[0 6 5]
VS S[0 6 6]
VS S[0 6 7]
VS S[0 6 8]
VS S[0 6 9]
VS S[0 7 0]
VS S[0 7 1]
VS S[0 7 2]
VS S[0 7 3]
VS S[0 7 4]
VS S[0 7 5]
VS S[0 7 6]
VS S[0 7 7]
VS S[0 7 8]
VS S[0 7 9]
VS S[0 8 0]
VS S[0 8 1] VSS [1 62 ]
VSS [1 61 ]
VSS [1 60 ]
VSS [1 59 ]
VSS [1 58 ]
VSS [1 57 ]
VSS [1 56 ]
VSS [1 55 ]
VSS [1 54 ]
VSS [1 53 ]
VSS [1 52 ]
VSS [1 51 ]
VSS [0 83 ]
VSS [0 84 ]
VSS [0 85 ]
VSS [0 86 ]
VSS [0 87 ]
VSS [0 88 ]
VSS [0 89 ]
VSS [0 90 ]
VSS [0 91 ]
VSS [0 92 ]
VSS [0 93 ]
VSS [0 94 ]
VSS [0 95 ]
VSS [0 96 ]
VSS [0 97 ]
VSS [0 98 ]
VSS [0 99 ]
VSS [1 00 ]
VSS [1 01 ]
VSS [1 02 ]
VSS [1 03 ]
VSS [1 04 ]
VSS [1 05 ]
VSS [1 07 ]
VSS [1 08 ]
VSS [1 09 ]
VSS [1 10 ]
VSS [1 11 ]
VSS [1 12 ]
VSS [1 13 ]
VSS [1 14 ]
VSS [1 15 ]
VSS [1 16 ]
VSS [1 17 ]
VSS [1 18 ]
VSS [1 19 ]
VSS [1 20 ]
VSS [1 21 ]
VSS [1 22 ]
VSS [1 23 ]
VSS [1 24 ]
VSS [1 25 ]
VSS [1 26 ]
VSS [1 27 ]
VSS [1 28 ]
VSS [1 29 ]
VSS [1 30 ]
VSS [1 31 ]
VSS [1 32 ]
VSS [1 33 ]
VSS [1 34 ]
VSS [1 35 ]
VSS [1 36 ]
VSS [1 37 ]
VSS [1 38 ]
VSS [1 39 ]
VSS [1 40 ]
VSS [1 41 ]
VSS [1 42 ]
VSS [1 43 ]
VSS [1 44 ]
VSS [1 45 ]
VSS [1 46 ]
VSS [1 06 ]
VS S[0 0 1]
VSS [1 49 ]
VSS [1 50 ]
VSS [1 47 ]
VSS [1 63 ]
C318
22U _6.3V_X5R_08
1. 5 V S
VC OR E
C PU_VC C SEN SE [31]
C37
22U _6.3V _X5R _08
C3 1 2
*0 .1 U_1 0 V_X7 R_ 0 4
Place near pin B26, C26
C3 0 3
1U_6.3V_04
VCO R E
Sheet 3 of 40
Intel Penryn
(Socket-P) 2/2