Service manual

Schematic Diagrams
Sandy Bridge - DDR ControI B - 5
B.Schematic Diagrams
Sandy Bridge - DDR ControI
M_ODT_C114 M_OD T_D1 15
M_MAA_D 1
CK_M_CH0_0_DN12
M_SCKE_B1 13
CK_M_CH0_2_DN12
CK_M_CH0_2_DP12
M_R AS_B_ N 13
M_MAA_C 3
10 OF 17
1554653-1 U31J
DDR0_BA[0]
CM28
DDR0_BA[1]
CN27
DDR0_BA[2]
CM20
DDR0_CAS_N
CL29
DDR0_CKE[0]
CL19
DDR0_CKE[1]
CM18
DDR0_CKE[2]
CH20
DDR0_CKE[3]
CP18
DDR0_CLK_DN[0]
CF24
DDR0_CLK_DN[1]
CE23
DDR0_CLK_DN[2]
CE21
DDR0_CLK_DN[3]
CF22
DDR0_CLK_DP[0]
CH24
DDR0_CLK_DP[1]
CG23
DDR0_CLK_DP[2]
CG21
DDR0_CLK_DP[3]
CH22
DDR0_CS_N[0]
CN25
DDR0_CS_N[1]
CH26
DDR0_CS_N[4]
CG27
DDR0_CS_N[5]
CF26
DDR0_MA[00]
CL25
DDR0_MA[01]
CR25
DDR0_MA[02]
CG25
DDR0_MA[03]
CK24
DDR0_MA[04]
CM24
DDR0_MA[05]
CL23
DDR0_MA[06]
CN23
DDR0_MA[07]
CM22
DDR0_MA[08]
CK22
DDR0_MA[09]
CN21
DDR0_MA[10]
CK26
DDR0_MA[11]
CL21
DDR0_MA[12]
CK20
DDR0_MA[13]
CG29
DDR0_MA[14]
CG19
DDR0_MA[15]
CN19
DDR0_ODT[0]
CE25
DDR0_ODT[1]
CE27
DDR0_ODT[2]
CH28
DDR0_ODT[3]
CF28
DDR0_RAS_N
CE29
DDR0_WE_N
CN29
RSVD
CB24
RSVD
CB26
RSVD
CB28
RSVD
CC21
RSVD
CC23
RSVD
CC25
RSVD
CC27
RSVD
CE19
RSVD
CF20
RSVD
CK28
RSVD
CL27
RSVD
CM26
DDR1_BA[0]
DB26
DDR1_BA[1]
DC25
DDR1_BA[2]
DF18
DDR1_CAS_N
CY30
DDR1_CKE[0]
CT20
DDR1_CKE[1]
CU19
DDR1_CKE[2]
CY18
DDR1_CKE[3]
DA17
DDR1_CLK_DN[0]
CV20
DDR1_CLK_DN[1]
CV22
DDR1_CLK_DN[2]
CY24
DDR1_CLK_DN[3]
DA21
DDR1_CLK_DP[0]
CY20
DDR1_CLK_DP[1]
CY22
DDR1_CLK_DP[2]
CV24
DDR1_CLK_DP[3]
DC21
DDR1_CS_N[0]
DB24
DDR1_CS_N[1]
CU23
DDR1_CS_N[4]
CU25
DDR1_CS_N[5]
CT24
DDR1_MA[00]
DC23
DDR1_MA[01]
DE23
DDR1_MA[02]
DF24
DDR1_MA[03]
DA23
DDR1_MA[04]
DB22
DDR1_MA[05]
DF22
DDR1_MA[06]
DE21
DDR1_MA[07]
DF20
DDR1_MA[08]
DB20
DDR1_MA[09]
DA19
DDR1_MA[10]
DF26
DDR1_MA[11]
DE19
DDR1_MA[12]
DC19
DDR1_MA[13]
DB30
DDR1_MA[14]
DB18
DDR1_MA[15]
DC17
DDR1_ODT[0]
CT22
DDR1_ODT[1]
DA25
DDR1_ODT[2]
CY26
DDR1_ODT[3]
CV26
DDR1_RAS_N
DB28
DDR1_WE_N
CV28
RSVD
CR19
RSVD
CR21
RSVD
CR23
RSVD
CR27
RSVD
CT18
RSVD
CT26
RSVD
CU21
RSVD
CU27
RSVD
CY28
RSVD
DA27
RSVD
DA29
RSVD
DE25
M_CAS_A_N12
M_MAA_C 4
M_SCKE_A112
M_C AS_B_ N 13
M_WE_A_N12
M_O D T_B0 13
M_W E_B_ N 13
M_MAA_A[15:0]12
11 OF 17
1554653-1 U31K
DDR2_BA[0]
R17
DDR2_BA[1]
L17
DDR2_BA[2]
P24
DDR2_CAS_N
T16
DDR2_CKE[0]
AA25
DDR2_CKE[1]
T26
DDR2_CKE[2]
U27
DDR2_CKE[3]
AD24
DDR2_CLK_DN[0]
Y24
DDR2_CLK_DN[1]
Y22
DDR2_CLK_DN[2]
W21
DDR2_CLK_DN[3]
W23
DDR2_CLK_DP[0]
AB24
DDR2_CLK_DP[1]
AB22
DDR2_CLK_DP[2]
AA21
DDR2_CLK_DP[3]
AA23
DDR2_CS_N[0]
AB20
DDR2_CS_N[1]
AE19
DDR2_CS_N[4]
AA19
DDR2_CS_N[5]
P18
DDR2_MA[00]
AB18
DDR2_MA[01]
R19
DDR2_MA[02]
U19
DDR2_MA[03]
T20
DDR2_MA[04]
P20
DDR2_MA[05]
U21
DDR2_MA[06]
R21
DDR2_MA[07]
P22
DDR2_MA[08]
T22
DDR2_MA[09]
R23
DDR2_MA[10]
T18
DDR2_MA[11]
U23
DDR2_MA[12]
T24
DDR2_MA[13]
R15
DDR2_MA[14]
W25
DDR2_MA[15]
U25
DDR2_ODT[0]
Y20
DDR2_ODT[1]
W19
DDR2_ODT[2]
AD18
DDR2_ODT[3]
Y18
DDR2_RAS_N
U17
DDR2_WE_N
P16
RSVD
M18
RSVD
W17
RSVD
Y16
RSVD
AA15
RSVD
AA17
RSVD
AB16
RSVD
AD16
RSVD
AD20
RSVD
AD22
RSVD
AE21
RSVD
AE23
RSVD
AE25
DDR3_BA[0]
A17
DDR3_BA[1]
E19
DDR3_BA[2]
B24
DDR3_CAS_N
B14
DDR3_CKE[0]
K24
DDR3_CKE[1]
M24
DDR3_CKE[2]
J25
DDR3_CKE[3]
N25
DDR3_CLK_D N[0]
J23
DDR3_CLK_D N[1]
J21
DDR3_CLK_D N[2]
M20
DDR3_CLK_D N[3]
K22
DDR3_CLK_DP[0]
L23
DDR3_CLK_DP[1]
L21
DDR3_CLK_DP[2]
K20
DDR3_CLK_DP[3]
M22
DDR3_CS_N[0]
G19
DDR3_CS_N[1]
J19
DDR3_CS_N[4]
K18
DDR3_CS_N[5]
G17
DDR3_MA[00]
A19
DDR3_MA[01]
E21
DDR3_MA[02]
F20
DDR3_MA[03]
B20
DDR3_MA[04]
D20
DDR3_MA[05]
A21
DDR3_MA[06]
F22
DDR3_MA[07]
B22
DDR3_MA[08]
D22
DDR3_MA[09]
G23
DDR3_MA[10]
D18
DDR3_MA[11]
A23
DDR3_MA[12]
E23
DDR3_MA[13]
A13
DDR3_MA[14]
D24
DDR3_MA[15]
F24
DDR3_ODT[0]
L19
DDR3_ODT[1]
F18
DDR3_ODT[2]
E17
DDR3_ODT[3]
J17
DDR3_RAS_N
B16
DDR3_WE_N
A15
RSVD
B18
RSVD
D14
RSVD
D16
RSVD
E15
RSVD
F14
RSVD
F16
RSVD
G15
RSVD
G21
RSVD
K16
RSVD
M16
RSVD
R25
RSVD
R27
M_SCKE_D1 15
M_SCS_B_N[1:0] 13
M_C AS_D _N 15
M_R AS_D _N 15
M_SCS_D_N[1:0] 15
M_WE_D_N 15
M_SBS_D1
M_SBS_D2
M_SBS_D0
M_SBS_D[2:0] 15
CK_M_CH3_0_DP 15
CK_M_CH3_0_DN 15
M_SCS_D_N1
M_SCS_D_N0
M_MAA_D 0
CK_M_CH3_2_DP 15
CK_M_CH3_2_DN 15
M_MAA_D [1 5:0] 15
M_MAA_D 2
M_SCKE_C114
M_MAA_D 3
M_SBS_B1
M_SBS_B0
M_SBS_B2
M_MAA_D 4
M_MAA_C 5
M_MAA_C 6
M_MAA_D 5
M_SCS_A_N1
M_SBS_A1
M_MAA_C 7
M_MAA_D 6
M_MAA_C 8
M_MAA_D 7
M_MAA_B1
M_MAA_C 9
M_MAA_C 10
M_MAA_D 8
M_OD T_D0 15
CK_M_CH2_0_DN14
CK_M_CH2_2_DP14
CK_M_CH2_2_DN14
M_MAA_C[ 15:0]14
M_WE_C_N14
M_CAS_ C_N14
M_SBS_B[2:0] 13
M_MAA_C 0
M_SCS_C_N1
CK_M_CH2_0_DP14
M_SBS_C0
M_RAS_ C_N14
M_SBS_C[2:0]14
M_SCS_C_N[1:0]14
M_SCS_C_N0
M_MAA_C 11
M_SCKE_B0 13
M_MAA_D 9
M_M AA_A0
M_MAA_C 12
M_MAA_D 10
M_SCKE_C014
M_MAA_C 13
M_SCKE_A012
M_SBS_A2
M_ODT_C014
M_MAA_C 14
M_MAA_D 11
M_MAA_C 15
M_MAA_D 12
M_MAA_B2
M_MAA_B3
M_MAA_D 13
M_MAA_B4
M_MAA_B5
M_SCKE_D0 15
M_M AA_A1
M_MAA_B6
CK_M_CH1_0_DP 13
M_MAA_D 14
M_ODT_A112
M_MAA_B7
M_MAA_B8
M_MAA_B9
M_SBS_A0
M_MAA_C 1
CK_M_CH0_0_DP12
CK_M_CH1_0_DN 13
M_MAA_B10
M_MAA_B0
M_MAA_D 15
M_MAA_B11
M_MAA_B12
M_SBS_A[2:0]12
M_SCS_B_N0
M_SCS_B_N1
M_MAA_B13
CK_M_CH1_2_DP 13
M_MAA_B14
M_MAA_B15
CK_M_CH1_2_DN 13
M_RAS_A_N12
M_SBS_C1
M_M AA_A3
M_M AA_A2
M_M AA_A5
M_M AA_A4
M_M AA_A6
M_M AA_A8
M_M AA_A7
M_M AA_A9
M_M AA_A1 0
M_M AA_A1 1
M_M AA_A1 2
M_M AA_A1 3
M_M AA_A1 4
M_M AA_A1 5
M_SCS_A_N0
M_SBS_C2
M_MAA_B[ 15: 0] 13
M_SCS_A_N[ 1:0]12
M_MAA_C 2
M_O D T_B1 13
M_ODT_A012
Sheet 4 of 63
Sandy Bridge -
DDR Control