Service manual

Schematic Diagrams
B - 4 Processor 1/7
B.Schematic Diagrams
Processor 1/7
PLACE NEAR U3
3
2
1
PEG _IR C OM P_R
EXP_RBIA S
Analog Thermal Sensor
20 mil
C36 7
0.1u_10V_X7R _04
R 205 750_1%_04
Q10
*2 N3 9 0 4
B
E C
C364
* 0.1u_10V _X5R_04
C366
0.1u_10V_X7R_04
Q16
G7 1 1 S T9U
OU T
1
VC C
2
GN D
3
D15 * RB751V
AC
R 206 49.9_1%_04
1:2 (4mils:8mils)
PCI EXPRESS -- GRAPHICS
DMI Intel(R) FDI
U16A
PZ98927-3641- 01F
DM I_RX# [0 ]
A24
DM I_RX# [1 ]
C23
DM I_RX# [2 ]
B22
DM I_RX# [3 ]
A21
DM I_RX[0 ]
B24
DM I_RX[1 ]
D23
DM I_RX[2 ]
B23
DM I_RX[3 ]
A22
DM I_TX# [0 ]
D24
DM I_TX# [1 ]
G24
DM I_TX# [2 ]
F23
DM I_TX# [3 ]
H23
DM I_TX[0 ]
D25
DM I_TX[1 ]
F24
DM I_TX[3 ]
G23
DM I_TX[2 ]
E23
FDI _TX#[0]
E22
FDI _TX#[1]
D21
FDI _TX#[2]
D19
FDI _TX#[3]
D18
FDI _TX#[4]
G21
FDI _TX#[5]
E19
FDI _TX#[6]
F21
FDI _TX#[7]
G18
FDI _TX[0 ]
D22
FDI _TX[1 ]
C21
FDI _TX[2 ]
D20
FDI _TX[3 ]
C18
FDI _TX[4 ]
G22
FDI _TX[5 ]
E20
FDI _TX[6 ]
F20
FDI _TX[7 ]
G19
FDI _FS YN C[0]
F17
FDI _FS YN C[1]
E17
FDI _IN T
C17
FDI _LSY NC [0]
F18
FDI _LSY NC [1]
D17
PEG_IC OM PI
B26
PE G_ ICO MP O
A26
PEG_RBIAS
A25
PEG_RCOMPO
B27
P EG_R X#[0]
K35
P EG_R X#[1]
J34
P EG_R X#[2]
J33
P EG_R X#[3]
G35
P EG_R X#[4]
G32
P EG_R X#[5]
F34
P EG_R X#[6]
F31
P EG_R X#[7]
D35
P EG_R X#[8]
E33
P EG_R X#[9]
C33
PEG_R X#[10]
D32
PEG_R X#[11]
B32
PEG_R X#[12]
C31
PEG_R X#[13]
B28
PEG_R X#[14]
B30
PEG_R X#[15]
A31
PE G_ RX[0]
J35
PE G_ RX[1]
H34
PE G_ RX[2]
H33
PE G_ RX[3]
F35
PE G_ RX[4]
G33
PE G_ RX[5]
E34
PE G_ RX[6]
F32
PE G_ RX[7]
D34
PE G_ RX[8]
F33
PE G_ RX[9]
B33
PEG_RX[10]
D31
PEG_RX[11]
A32
PEG_RX[12]
C30
PEG_RX[13]
A28
PEG_RX[14]
B29
PEG_RX[15]
A30
PEG_TX#[0]
L33
PEG_TX#[1]
M35
PEG_TX#[2]
M33
PEG_TX#[3]
M30
PEG_TX#[4]
L31
PEG_TX#[5]
K32
PEG_TX#[6]
M29
PEG_TX#[7]
J31
PEG_TX#[8]
K29
PEG_TX#[9]
H30
PEG_TX#[10]
H29
PEG_TX#[11]
F29
PEG_TX#[12]
E28
PEG_TX#[13]
D29
PEG_TX#[14]
D27
PEG_TX#[15]
C26
PEG _TX[0]
L34
PEG _TX[1]
M34
PEG _TX[2]
M32
PEG _TX[3]
L30
PEG _TX[4]
M31
PEG _TX[5]
K31
PEG _TX[6]
M28
PEG _TX[7]
H31
PEG _TX[8]
K28
PEG _TX[9]
G30
PEG _TX[10 ]
G29
PEG _TX[11 ]
F28
PEG _TX[12 ]
E27
PEG _TX[13 ]
D28
PEG _TX[14 ]
C27
PEG _TX[15 ]
C25
U18
*W 83L771A WG
VDD
1
D+
2
D-
3
TH ERM
4
GN D
5
ALE RT
6
SD ATA
7
SC LK
8
R225 *10m il_short
3.3V
3.3V
DMI_TXP116
DMI_TXP016
DMI_TXN016
DMI_TXP316
DMI_TXP216
DMI_TXN316
DMI_TXN216
DMI_TXN116
DMI_RXN216
DMI_RXN116
DMI_RXN016
DMI_RXP116
DMI_RXP016
DMI_RXN316
FD I_FSY NC 116
FD I_FSY NC 016
DMI_RXP316
DMI_RXP216
FD I_LSYN C116
FD I_LSYN C016
FD I_INT16
FD I_TXN 216
FD I_TXN 116
FD I_TXN 016
FD I_TXN 516
FD I_TXN 416
FD I_TXN 316
FD I_TXP016
FD I_TXN 716
FD I_TXN 616
FD I_TXP416
FD I_TXP316
FD I_TXP216
FD I_TXP116
FD I_TXP716
FD I_TXP616
FD I_TXP516
SMC _CPU _TH ERM 15,28
3.3V4,1 2 ,1 4 ,15,1 6 ,18 ,19 ,2 0 ,2 1, 23 ,2 4 ,2 5, 29 ,3 0,3 1,3 3 ,3 4 ,3 5
PM_ EXTTS#_EC 4
THER M_AL ER T# 2 8
SMD _CPU _TH ERM 15,28
CR IT_T EM P_ REP # 19
TH ERM _V OLT 28
On Board DDR3 Thermal Sensor
PROCESSOR 1/7 ( DMI,PEG,FDI )
It applies to Auburndale and Clarksfield discrete graphic designs.
If discrete graphic chip is used for Auburndale, VAXG (GFX core) rail can be connected
to GND if motherboard only supports discrete graphics and also in a common
motherboard design if GFX VR is not stuffed. On the other hand, if the VR is stuffed,
VAXG can be left floating in a common motherboard design (Gfx VR keeps VAXG from
floating).
In addition, FDI_RXN_[7:0] and FDI_RXP_[7:0] can be le
ft floating on the PCH.
FDI_TX[7:0] and FDI_TX#[7:0] can be left floating on the Auburndale.
The GFX_IMON, FDI_FSYNC[0], FDI_FSYNC[1], FDI_LSYNC[0], FDI_LSYNC[1], and
FDI_INT signals should be tied to GND (through 1K ?% resistors) in the common
motherboard design case. Please not that if these signals are left floating, there are no
functional impacts but a small amount of power (~15 mW) maybe wasted. VAXG_SENSE
and VSSAXG_SENSE on Auburndale can be left as no
connect.
DPLL_REF_SSCLK and DPLL_REF_SSCLK# can be connected to GND on Auburndale
directly if motherboard only supports discrete graphics. In a common motherboard
design, these pins are driven via PCH (even if Graphics is disabled by BIOS) thus no
external termination is required.
Sheet 3 of 40
Processor 1/7