Service manual

Schematic Diagrams
B - 2 System Block Diagram
B.Schematic Diagrams
System Block Diagram
Sheet 1 of 40
System Block
Diagram
Calpella System Block Diagram
PO WE R SW IT CH +H O TK EY X 3
(USB2)
Clock Generator
Ne w Ca r d
(USB11)
LCD CONNECTOR, <8 "
TOUCH PAD
CRT CONNECTOR
LPC
CARD READER
POWE R G PU
SMART
BATTERY
SO-DI MM1
INT SPK R
CLICK BOARD
SOCKET
<=8"
Memory Termination
PCIE
27x27mm
1071 Ball FCBGA
480 Mbps
DDRII I
Synaptic
Mini PCIE
SLG8SP585V
14.318 MHz
7IN1
SPI
0. 5" ~6 .5 "
1"~16"
DDRII I
INT MIC
25
MHz
Arrandale
USB0 Blue to ot h
24 MHz
<12"
FDI
HDMI
AZALIA
MDC
MODULE
INT SPK L
128pins LQFP
SO-DI MM0
32.768KHz
MDC CON
EC SMBUS
AZALIA LINK
0.1"~13
SO CK ET
CCD
SYSTEM SMBUS
BI OS
SP I
LAN
IT E 85 02 E
<1 2"
SATA HDD
Ibex Peak-M
Platform
Controller
Hub (PCH)
SATA ODD
INT. K/B
CLICK BOARD
Azal ia C od ecEC
0.5" ~1 1"
RJ-11
SOCKET
<1 5 "
5V,3V,5VS,3VS,1.5VS,
USB2.0
CR T SW IT CH
L VD S SW IT CH
RJ-45
USB1
VDD3 ,V DD5
DMI*4
rPGA989/988
W83L771AWG
32.768 KHz
JM I CR O
SATA I/II 3.0Gb/s
(USB3)
6- 71 -C 45 0S -D 02
800/1067 MHz
DDR3 / 1.5V
1.8VS
VI A VT 18 12
POWER SWITCH BOARD
33 MHz
THER MA L
SENS OR
100 MHz
1 4* 1 4* 1. 6m m
USB4
PROCESSOR
810602-1703
SMART
FAN
(USB5)
JMC251
PJ 11 +U SB +E AR PH O NE +E XT .M IC
AUDIO BOARD
AU DI O
BO AR D
6- 71 -C 41 0A -D 01
6- 71 -C 45 02 -D 02
TPM
N7101
AMP
3G C AR D
(U SB 9)
(Optional)
INTERNAL
GRAPHICS
INTERNAL
GRAPHICS
HP
OUT
AUDI O BO AR D
MIC
IN
VCORE 1.1VS_VTT
1.5V,0.75VS(VTT_MEM)