Service manual

Schematic Diagrams
Sequence B - 43
B.Schematic Diagrams
Sequence
RTCRST#
VCCRTC
5V
3.3V
SUSB#
SUSC#
DD_ON#
5VS
1.5V (VDDQ)
3.3VS
1.8VS
1.1VS_VTT
SM_DRAMPWROK
ALL_SYS_PWRGD
VCORE_ON
VCORE
CLKIN_BCLK
SYS_PWRGD/SB_PWROK
DDR1.5V_PWRGD
H_CPUPWRGD
SPEC 0.0001mS ~ 500mS
SPEC MIN 9mS
SPEC MIN 99mS
SUS_STATE#
PLT_RST#
E51 20Q D02 PO WER SEQ UEN CE
870u s (DD_O N# to 5 V)
38.8m s VCCRT C to R TCRST#
1 .5ms ( DD_ON# to 3.3V )
15 0ms85ms
20m s (PWR BTN# to RSMRS T#)
98ms ( RSMRST# to SUS C#)
1us (RSMR ST# to SUS_PW R_ACK)
4.4ms ( 1.5V ( VDDQ) t o DDR1 .5V_PWR GD)
57us (SUSC# to SUS B#))
2. 17ms ( SUSC# to 1.5V (VDDQ ))
1. 52 ms( SUSB# t o 3.3V S)
4.7 5ms (SU SB# to VTT_ME M(0.75 V))
VTT_MEM(0.75V)
5.75 ms(SU SB# to 1.8VS)
1. 27 ms( 1.8VS t o 1.8V S_PWGD)
1.27 m s(1.1VS _VTT_E N to 1. 1VS_VT T)
0 m s(1.1V S_VTT t o 1.1V S_PWRGD )
1.1VS_PWRGD
8.4 ms(SU SB# to 1.1VS_ VTT)
0 m s(1.1V S_VTT t o ALL_ SYS_PWR GD)
H_VTTPWRGD
8.47 ms(SUS B# to VGFX_VC ORE_EN )
2 ms(AL L_SYS_P WRGD t o H_VTT PWRGD)
0 ms(VGF X_VCOR E to VG FX_VORE _PG)
9 .29ms(S USB# t o VGFX_ CORE)
0 ms (VGFX_V CORE_E N to VG FX_VID )
2.8 4ms(VC ORE__ON to VCO RE)
280ms(A LL_SYS _PWRGD to VCO RE_ON)
280ms(A LL_SYS _PWRGD to PM_ MPWROK)
120u s(VCOR E to CL KEN#)
6.48ms (VCORE to DEL AY_PWRG D)
1. 2ms(CL KEN# to CLKIN _BCLK)
68ms
(VCORE to H_C PUPWRG D)
37.7ms( VCORE to SM_D RAMPWRO K)
297.72 ms
(SUSB# to SYS _PWRGD /SB_PWR OK)
SPEC 0.03mS ~ 2mS
1.64 ms
SPEC MIN 60us
(SUS_ST ATE# to PLT_R ST#)
23 0us
(H_ CPUPWR GD to S US_STA TE#)
SUS_PWR_ACK
PWRBTN#
92 0us (SU SB# to 5VS)
VGFX_VCORE_EN (DFGT_VR_EN)
VGFX_CORE
1.8VS_PWRGD
VGFX_VORE_PG
MEPWROK
1.1VS_VTT_EN
VGFX_VID
VCORE PG (DELAY_PWRGD)
RSMRST#
SPEC 0.05mS ~ 650mS
SPEC MAX 3mS
CLKEN#
Sheet 42 of 42
Sequence